From 7644420d83d492c854ebd17d53d9b1525baf538e Mon Sep 17 00:00:00 2001 From: Corey Osgood Date: Wed, 15 Oct 2008 06:41:16 +0000 Subject: [PATCH] Commit a few things I forgot with the vt8237 patch, and also a couple minor whitespace fixes I've stumbled accross. Signed-off-by: Corey Osgood Acked-by: Corey Osgood git-svn-id: svn://coreboot.org/repository/coreboot-v3@929 f3766cd6-281f-0410-b1cd-43a5c92072e9 --- arch/x86/pci_ops_conf1.c | 1 - include/device/pci_ids.h | 12 ++++++++++++ include/spd.h | 8 +++++--- superio/winbond/w83627hf/stage1.c | 2 +- 4 files changed, 18 insertions(+), 5 deletions(-) diff --git a/arch/x86/pci_ops_conf1.c b/arch/x86/pci_ops_conf1.c index d305a2a9d5..9724d53385 100644 --- a/arch/x86/pci_ops_conf1.c +++ b/arch/x86/pci_ops_conf1.c @@ -112,7 +112,6 @@ void pci_conf1_write_config32(u32 bdf, int where, u32 value) */ int pci_conf1_find_on_bus(u16 bus, u16 vid, u16 did, u32 *busdevfn) - { u16 devfn; u32 val; diff --git a/include/device/pci_ids.h b/include/device/pci_ids.h index d938ac0db0..3032c2f59c 100644 --- a/include/device/pci_ids.h +++ b/include/device/pci_ids.h @@ -263,4 +263,16 @@ #define PCI_DEVICE_ID_NVIDIA_MCP55_TRIM 0x036A #define PCI_DEVICE_ID_NVIDIA_MCP55_PMU 0x036B +#define PCI_VENDOR_ID_VIA 0x1106 +#define PCI_DEVICE_ID_VIA_VT8237_EHCI 0x3104 +#define PCI_DEVICE_ID_VIA_VT8237_LAN 0x3065 +#define PCI_DEVICE_ID_VIA_VT8237R_LPC 0x3227 +#define PCI_DEVICE_ID_VIA_VT8237S_LPC 0x3372 +#define PCI_DEVICE_ID_VIA_VT8237_PATA 0x0571 +#define PCI_DEVICE_ID_VIA_VT8237R_SATA 0x3149 +#define PCI_DEVICE_ID_VIA_VT8237S_SATA 0x5372 +#define PCI_DEVICE_ID_VIA_VT8237_UHCI 0x3038 +#define PCI_DEVICE_ID_VIA_VT8237_VLINK 0x287e + + #endif /* DEVICE_PCI_IDS_H */ diff --git a/include/spd.h b/include/spd.h index f2d62c55c7..d1f0226502 100644 --- a/include/spd.h +++ b/include/spd.h @@ -105,9 +105,11 @@ #define SPD_tRAS SPD_MIN_ACTIVE_TO_PRECHARGE_DELAY #define SPD_BANK_DENSITY SPD_DENSITY_OF_EACH_ROW_ON_MODULE #define SPD_ADDRESS_CMD_HOLD SPD_CMD_SIGNAL_INPUT_HOLD_TIME -#define SPD_tRC 41 /* SDRAM Device Minimum Active to Active/Auto Refresh Time (tRC) */ -#define SPD_tRFC 42 /* SDRAM Device Minimum Auto Refresh to Active/Auto Refresh (tRFC) */ - +#define SPD_tWR SPD_WRITE_RECOVERY_TIME +#define SPD_tWTR SPD_INT_WRITE_TO_READ_DELAY +#define SPD_tRTP SPD_INT_READ_TO_PRECHARGE_DELAY +#define SPD_tRC SPD_MIN_ACT_TO_ACT_AUTO_REFRESH +#define SPD_tRFC SPD_MIN_AUTO_REFRESH_TO_ACT /* SPD_MEMORY_TYPE values. */ #define SPD_MEMORY_TYPE_FPM_DRAM 1 diff --git a/superio/winbond/w83627hf/stage1.c b/superio/winbond/w83627hf/stage1.c index 90b54199d1..dc040737a4 100644 --- a/superio/winbond/w83627hf/stage1.c +++ b/superio/winbond/w83627hf/stage1.c @@ -25,7 +25,7 @@ void w83627hf_enable_serial(u8 dev, u8 serial, u16 iobase) { rawpnp_enter_ext_func_mode(dev); - rawpnp_set_logical_device(dev,serial); + rawpnp_set_logical_device(dev, serial); rawpnp_set_enable(dev, 0); rawpnp_set_iobase(dev, PNP_IDX_IO0, iobase); rawpnp_set_enable(dev, 1);