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cpu/amd/geode_lx/cache_as_ram.inc: Trivial - Fix indent with tabs
Change-Id: Ic65f8d2cbb5bc459cf513c6b34a5f1846cb2b897 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6549 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
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1 changed files with 15 additions and 15 deletions
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@ -189,24 +189,25 @@ DCacheSetupGood:
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call main
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done_cache_as_ram_main:
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/* We now run over the stack-in-cache, copying it back to itself to invalidate the cache */
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/* We now run over the stack-in-cache,
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* copying it back to itself to invalidate the cache */
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push %edi
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mov $(CONFIG_DCACHE_RAM_SIZE/4),%ecx
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push %esi
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mov $(CONFIG_DCACHE_RAM_BASE),%edi
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mov %edi,%esi
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cld
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rep movsl %ds:(%esi),%es:(%edi)
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pop %esi
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pop %edi
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push %edi
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mov $(CONFIG_DCACHE_RAM_SIZE/4),%ecx
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push %esi
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mov $(CONFIG_DCACHE_RAM_BASE),%edi
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mov %edi,%esi
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cld
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rep movsl %ds:(%esi),%es:(%edi)
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pop %esi
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pop %edi
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/* Clear the cache out to ram */
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wbinvd
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/* re-enable the cache */
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movl %cr0, %eax
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xorl $(CR0_CD + CR0_NW), %eax /* clear the CD and NW bits */
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movl %eax, %cr0
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/* re-enable the cache */
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movl %cr0, %eax
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xorl $(CR0_CD + CR0_NW), %eax /* clear the CD and NW bits */
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movl %eax, %cr0
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__main:
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post_code(POST_PREPARE_RAMSTAGE)
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@ -227,4 +228,3 @@ __main:
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post_code(POST_DEAD_CODE)
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hlt
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jmp .Lhlt
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