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Fix rs690 bug about GPPSB configuration.

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Signed-off-by:  Maggie Li <maggie.li@amd.com>
Reviewed-by:    Zheng Bao <Zheng.bao@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>

git-svn-id: svn://coreboot.org/repository/coreboot-v3@1123 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Marc Jones 2009-01-23 22:18:24 +00:00
parent d6cf2da867
commit 70b7967bb6
1 changed files with 2 additions and 2 deletions
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4
southbridge/amd/rs690/pcie.c
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@ -135,8 +135,8 @@ static void switching_gpp_configurations(struct device * nb_dev, struct device *
/* sets desired GPPSB configurations, bit4-7 */
reg = nbmisc_read_index(nb_dev, 0x67);
reg &= 0xff0f; /* clean */
reg |= cfg->gpp_configuration;
reg &= 0xffffff0f; /* clean */
reg |= cfg->gpp_configuration << 4;
nbmisc_write_index(nb_dev, 0x67, reg);
/* read bit14 and write back its inverst value */