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UPSTREAM: spi: Add function callback to get configuration of SPI bus
Add a new callback to spi_ctrlr structure - get_config - to obtain
configuration of SPI bus from the controller driver. Also, move common
config definitions from acpi_device.h to spi-generic.h
BUG=chrome-os-partner:59832
BRANCH=None
TEST=Compiles successfully
Change-Id: I65605a03c4368f1bb4cea38d5b88e0aa4f600249
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Original-Commit-Id: 3e01b633d6
Original-Change-Id: I412c8c70167d18058a32041c2310bc1c884043ce
Original-Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/18337
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/444805
This commit is contained in:
parent
ac5e55604a
commit
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3 changed files with 53 additions and 17 deletions
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@ -18,6 +18,7 @@
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#include <device/i2c.h>
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#include <stdint.h>
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#include <spi-generic.h>
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#define ACPI_DESCRIPTOR_LARGE (1 << 7)
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#define ACPI_DESCRIPTOR_INTERRUPT (ACPI_DESCRIPTOR_LARGE | 9)
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@ -216,23 +217,6 @@ void acpi_device_write_i2c(const struct acpi_i2c *i2c);
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* ACPI SPI Bus
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*/
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enum spi_clock_phase {
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SPI_CLOCK_PHASE_FIRST,
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SPI_CLOCK_PHASE_SECOND
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};
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/* SPI Flags bit 0 */
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enum spi_wire_mode {
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SPI_4_WIRE_MODE,
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SPI_3_WIRE_MODE
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};
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/* SPI Flags bit 1 */
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enum spi_polarity {
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SPI_POLARITY_LOW,
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SPI_POLARITY_HIGH
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};
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struct acpi_spi {
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/* Device selection */
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uint16_t device_select;
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@ -88,6 +88,16 @@ int spi_xfer(const struct spi_slave *slave, const void *dout, size_t bytesout,
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return -1;
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}
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int spi_get_config(const struct spi_slave *slave, struct spi_cfg *cfg)
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{
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const struct spi_ctrlr *ctrlr = slave->ctrlr;
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if (ctrlr && ctrlr->get_config)
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return ctrlr->get_config(slave, cfg);
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return -1;
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}
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void __attribute__((weak)) spi_init(void)
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{
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/* Default weak implementation - do nothing. */
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@ -59,9 +59,38 @@ struct spi_op {
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enum spi_op_status status;
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};
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enum spi_clock_phase {
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SPI_CLOCK_PHASE_FIRST,
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SPI_CLOCK_PHASE_SECOND
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};
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enum spi_wire_mode {
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SPI_4_WIRE_MODE,
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SPI_3_WIRE_MODE
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};
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enum spi_polarity {
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SPI_POLARITY_LOW,
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SPI_POLARITY_HIGH
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};
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struct spi_cfg {
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/* CLK phase - 0: Phase first, 1: Phase second */
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enum spi_clock_phase clk_phase;
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/* CLK polarity - 0: Low, 1: High */
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enum spi_polarity clk_polarity;
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/* CS polarity - 0: Low, 1: High */
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enum spi_polarity cs_polarity;
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/* Wire mode - 0: 4-wire, 1: 3-wire */
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enum spi_wire_mode wire_mode;
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/* Data bit length. */
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unsigned int data_bit_length;
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};
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/*-----------------------------------------------------------------------
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* Representation of a SPI contoller.
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*
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* get_config: Get configuration of SPI bus
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* claim_bus: Claim SPI bus and prepare for communication.
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* release_bus: Release SPI bus.
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* setup: Setup given SPI device bus.
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@ -69,6 +98,8 @@ struct spi_op {
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* xfer_vector: Vector of SPI transfer operations.
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*/
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struct spi_ctrlr {
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int (*get_config)(const struct spi_slave *slave,
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struct spi_cfg *cfg);
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int (*claim_bus)(const struct spi_slave *slave);
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void (*release_bus)(const struct spi_slave *slave);
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int (*setup)(const struct spi_slave *slave);
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@ -101,6 +132,17 @@ extern const size_t spi_ctrlr_bus_map_count;
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*/
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void spi_init(void);
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/*
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* Get configuration of SPI bus.
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*
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* slave: Pointer to slave structure.
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* cfg: Pointer to SPI configuration that needs to be filled.
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*
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* Returns:
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* 0 on success, -1 on error
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*/
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int spi_get_config(const struct spi_slave *slave, struct spi_cfg *cfg);
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/*-----------------------------------------------------------------------
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* Set up communications parameters for a SPI slave.
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*
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