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UPSTREAM: libpayload: head.S: Avoid clearing BSS (and heap) again

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3 out of 4 architectures currently zero out the payload BSS in early
assembly code, which is pointless since the code loading the payload has
already done that (with a more efficient memset). ARM64 has never had
any code like this and can run just fine without it. This also defeats
the new optimization of moving the heap out of the BSS, since all three
implementations assume that everything between _edata and _end is BSS.
We should just take this out.

BUG=None
BRANCH=None
TEST=None

Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/16091
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

Change-Id: I45cd2dabd94da43ff0f77e990f11c877cee6cda1
Reviewed-on: https://chromium-review.googlesource.com/370697
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Julius Werner 2016-08-05 21:27:47 -07:00 • committed by chrome-bot
parent e10e635726
commit 6ae28b205b
3 changed files with 0 additions and 37 deletions
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19
payloads/libpayload/arch/arm/head.S
View file

@ -33,22 +33,6 @@
* Our entry point * Our entry point
*/ */
ENTRY(_entry) ENTRY(_entry)
/* TODO: disable interrupts */
/* Clear BSS */
mov r12, #0
ldr r2, bss_boundaries
ldr r3, bss_boundaries + 4
cmp r2, r3
beq no_bss
sub r3, #4 /* Account for late condition check. */
loop:
cmp r2, r3
str r12, [r2], #4
blt loop
no_bss:
/* Save off the location of the coreboot tables */ /* Save off the location of the coreboot tables */
ldr r1, 1f ldr r1, 1f
str r0, [r1] str r0, [r1]
@ -70,9 +54,6 @@ no_bss:
ENDPROC(_entry) ENDPROC(_entry)
.align 4 .align 4
bss_boundaries:
.word _edata
.word _end
1: 1:
.word cb_header_ptr .word cb_header_ptr
2: 2:

10
payloads/libpayload/arch/mips/head.S
View file

@ -74,16 +74,6 @@ _entry:
1: 1:
lw $gp, 0($ra) lw $gp, 0($ra)
/* Clear .bss: start_bss = _edata, end_bss = _end */
la $t0, _edata
sw $zero, ($t0)
la $t1, _end - 4
clear_bss:
addiu $t0, 4
sw $zero, ($t0)
bne $t0, $t1, clear_bss
nop
/* Save off the location of the coreboot tables */ /* Save off the location of the coreboot tables */
la $at, cb_header_ptr la $at, cb_header_ptr
sw $a0, 0x00($at) sw $a0, 0x00($at)

8
payloads/libpayload/arch/x86/head.S
View file

@ -73,14 +73,6 @@ _init:
movl %eax,loader_eax movl %eax,loader_eax
movl %ebx,loader_ebx movl %ebx,loader_ebx
/* Clear the bss */
cld
movl $.bss, %edi
movl $_end, %ecx
subl %edi, %ecx
xor %ax, %ax
rep stosb
/* Setup new stack. */ /* Setup new stack. */
movl $_stack, %ebx movl $_stack, %ebx