mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
hack to make v3 rom access a lot faster.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1056 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
parent
20e53b2345
commit
675731bf42
2 changed files with 4 additions and 1 deletions
|
@ -176,7 +176,7 @@ config CARBASE
|
|||
default 0x80000 if CPU_AMD_GEODELX
|
||||
default 0xc8000 if CPU_AMD_K8
|
||||
default 0xffef0000 if CPU_VIA_C7
|
||||
default 0xffef0000 if CPU_INTEL_CORE2
|
||||
default 0xffdf8000 if CPU_INTEL_CORE2
|
||||
help
|
||||
This option sets the base address of the area used for CAR.
|
||||
|
||||
|
|
|
@ -22,6 +22,9 @@
|
|||
#define CACHE_AS_RAM_SIZE CONFIG_CARSIZE
|
||||
#define CACHE_AS_RAM_BASE CONFIG_CARBASE
|
||||
|
||||
#define XIP_ROM_BASE 0xfff00000
|
||||
#define XIP_ROM_SIZE 0x00100000
|
||||
|
||||
#include <mtrr.h>
|
||||
|
||||
#include <macros.h>
|
||||
|
|
Loading…
Add table
Reference in a new issue