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UPSTREAM: intel 82801dx/gx/ix: Commit SMM relocation code to DRAM
Make sure relocation code reaches DRAM before issuing any SMIs. Snooping and cache coherency may have undefined behaviour as CPUs do not have uniform MTRR layout yet. BUG=None BRANCH=None TEST=None Signed-off-by: Kysti Mlkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/17712 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Change-Id: I47a7d684e05ff8c1c2f1f6a5bf8c0bbc561d9eac Reviewed-on: https://chromium-review.googlesource.com/418959 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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3 changed files with 3 additions and 0 deletions
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@ -252,6 +252,7 @@ static void smm_relocate(void)
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/* copy the SMM relocation code */
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memcpy((void *)0x38000, &smm_relocation_start,
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&smm_relocation_end - &smm_relocation_start);
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wbinvd();
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printk(BIOS_DEBUG, "\n");
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dump_smi_status(reset_smi_status());
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@ -252,6 +252,7 @@ static void smm_relocate(void)
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/* copy the SMM relocation code */
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memcpy((void *)0x38000, &smm_relocation_start,
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&smm_relocation_end - &smm_relocation_start);
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wbinvd();
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printk(BIOS_DEBUG, "\n");
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dump_smi_status(reset_smi_status());
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@ -256,6 +256,7 @@ static void smm_relocate(void)
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/* copy the SMM relocation code */
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memcpy((void *)0x38000, &smm_relocation_start,
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&smm_relocation_end - &smm_relocation_start);
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wbinvd();
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printk(BIOS_DEBUG, "\n");
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dump_smi_status(reset_smi_status());
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