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ipl.S: disable unstable SR13 SR14 programming
irq_tables.c: updated IRQ routing mainboard.c: don't disable flash write
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131a050256
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3 changed files with 3 additions and 5 deletions
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@ -58,7 +58,7 @@ lpc_init_start: # inits LPC bridge for accessing
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lpc_init_complete:
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lpc_init_complete:
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#if 0
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SET_VGA_SR13:
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SET_VGA_SR13:
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movw $0x03c4,%dx #SR5
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movw $0x03c4,%dx #SR5
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movb $0x05,%al
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movb $0x05,%al
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@ -373,7 +373,7 @@ Clock_Gen_Exit:
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#endif
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movw $0x5501, %ax # MDOE# enable, this bit
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movw $0x5501, %ax # MDOE# enable, this bit
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CALL_SP(write_pci_register) # should be set before sizing.
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CALL_SP(write_pci_register) # should be set before sizing.
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@ -17,7 +17,7 @@ const struct irq_routing_table intel_irq_routing_table = {
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/* bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
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/* bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
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{0x00, 0x48, {{0x42, 0xdef8}, {0x43, 0xdef8}, {0x44, 0xdef8}, {0x41, 0xdef8}},
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{0x00, 0x48, {{0x42, 0xdef8}, {0x43, 0xdef8}, {0x44, 0xdef8}, {0x41, 0xdef8}},
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0x01, 0x00},
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0x01, 0x00},
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{0x00, 0x58, {{0x42, 0xdef8}, {0x43, 0xdef8}, {0x44, 0xdef8}, {0x41, 0xdef8}},
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{0x00, 0x58, {{0x43, 0xdef8}, {0x44, 0xdef8}, {0x41, 0xdef8}, {0x42, 0xdef8}},
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0x00, 0x00},
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0x00, 0x00},
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{0x00, 0x68, {{0x41, 0xdef8}, {0x42, 0xdef8}, {0x43, 0xdef8}, {0x44, 0xdef8}},
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{0x00, 0x68, {{0x41, 0xdef8}, {0x42, 0xdef8}, {0x43, 0xdef8}, {0x44, 0xdef8}},
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0x00, 0x00},
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0x00, 0x00},
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@ -217,8 +217,6 @@ mainboard_fixup(void)
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pcidev = pci_find_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503, (void *)NULL);
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pcidev = pci_find_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503, (void *)NULL);
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pci_read_config_word(pcidev, 0x74, &acpibase);
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pci_read_config_word(pcidev, 0x74, &acpibase);
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/* Flash can not be flashed, enable USB device in undocumented Bit 6 */
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pci_write_config_byte(pcidev, 0x45, 0xA0);
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led_on(10);
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led_on(10);
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