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UPSTREAM: soc/intel/skylake: Use SendVrMbxCmd1 for FSP 2.0

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In FSP 2.0 the UPD to send extra VR Mailbox commands is switched from
SendVrMbxCmd to SendVrMbxCmd1. Use the same in silicon initialization.

BUG=None
BRANCH=None
TEST=None

Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-on: https://review.coreboot.org/17578
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

Change-Id: I46bd50c9acc0456e2483f20ccb5e9ec2a0de232a
Reviewed-on: https://chromium-review.googlesource.com/415641
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Rizwan Qureshi 2016-11-23 15:25:19 +05:30 • committed by chrome-bot
parent 5b5071d7bc
commit 5af231205c
1 changed files with 9 additions and 1 deletions
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10
src/soc/intel/skylake/chip_fsp20.c
View file

@ -224,7 +224,15 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
dev = dev_find_slot(0, PCH_DEVFN_SPI);
params->ShowSpiController = dev->enabled;
params->SendVrMbxCmd = config->SendVrMbxCmd;
/*
* Send VR specific mailbox commands:
* 000b - no VR specific command sent
* 001b - VR mailbox command specifically for the MPS IMPV8 VR
* will be sent
* 010b - VR specific command sent for PS4 exit issue
* 100b - VR specific command sent for MPS VR decay issue
*/
params->SendVrMbxCmd1 = config->SendVrMbxCmd;
soc_irq_settings(params);
}