diff --git a/src/cpu/p6/l2_cache.c b/src/cpu/p6/l2_cache.c index 1a5c463419..c682155d89 100644 --- a/src/cpu/p6/l2_cache.c +++ b/src/cpu/p6/l2_cache.c @@ -61,7 +61,7 @@ static void cache_disable(void) unsigned int tmp; /* Disable cache */ - printk( KERN_INFO "Disable Cache\n"); + DBG("Disable Cache\n"); /* Write back the cache and flush TLB */ asm volatile ("movl %%cr0, %0\n\t" @@ -81,7 +81,7 @@ static void cache_enable(void) "movl %0, %%cr0\n\t" :"=r" (tmp) : : "memory"); - printk( KERN_INFO "Enable Cache\n"); + DBG("Enable Cache\n"); } // GOTO bad and GOTO done added by rgm. diff --git a/src/cpu/p6/mtrr.c b/src/cpu/p6/mtrr.c index db3f7cb469..241e301092 100644 --- a/src/cpu/p6/mtrr.c +++ b/src/cpu/p6/mtrr.c @@ -31,7 +31,6 @@ static char rcsid[] = "$Id$"; #include #include -#define DEBUG #include #define arraysize(x) (sizeof(x)/sizeof((x)[0])) diff --git a/src/lib/linuxbiosmain.c b/src/lib/linuxbiosmain.c index 5cb82fd643..01247047a2 100644 --- a/src/lib/linuxbiosmain.c +++ b/src/lib/linuxbiosmain.c @@ -1494,6 +1494,7 @@ linuxbiosmain(unsigned long base, unsigned long totalram) bytes_out = 0; output_ptr = 0; + printk("\n"); printk("Welcome to start32, the open sourced starter.\n"); printk("This space will eventually hold more diagnostic information.\n"); printk("\n"); diff --git a/src/lib/linuxpci.c b/src/lib/linuxpci.c index bf2755a14e..d7fe1b0157 100644 --- a/src/lib/linuxpci.c +++ b/src/lib/linuxpci.c @@ -103,14 +103,14 @@ void pci_set_master(struct pci_dev *dev) pci_read_config_word(dev, PCI_COMMAND, &cmd); if (!(cmd & PCI_COMMAND_MASTER)) { - printk("PCI: Enabling bus mastering for device %02x:%02x\n", + DBG("PCI: Enabling bus mastering for device %02x:%02x\n", dev->bus->number, dev->devfn); cmd |= PCI_COMMAND_MASTER; pci_write_config_word(dev, PCI_COMMAND, cmd); } pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat); if (lat < 16) { - printk("PCI: Increasing latency timer of device %02x:%02x to 64\n", + DBG("PCI: Increasing latency timer of device %02x:%02x to 64\n", dev->bus->number, dev->devfn); pci_write_config_byte(dev, PCI_LATENCY_TIMER, 64); } @@ -180,7 +180,7 @@ void pci_read_bases(struct pci_dev *dev, unsigned int howmany) #if BITS_PER_LONG == 64 dev->base_address[reg - 1] |= ((unsigned long) addr) << 32; #else - printk("PCI: Unable to handle 64-bit address for device " + printk(KERN_ERR "PCI: Unable to handle 64-bit address for device " "%02x:%02x\n", dev->bus->number, dev->devfn); dev->base_address[reg - 1] = 0; #endif @@ -246,7 +246,7 @@ unsigned int pci_scan_bus(struct pci_bus *bus) } if ((dev = kmalloc(sizeof(*dev), GFP_ATOMIC)) == 0) { - printk("PCI: out of memory.\n"); + printk(KERN_ERR "PCI: out of memory.\n"); continue; } @@ -291,8 +291,8 @@ unsigned int pci_scan_bus(struct pci_bus *bus) break; default: /* unknown header */ bad: - printk("PCI: %02x:%02x [%04x/%04x/%06x] has unknown header type %02x, " - "ignoring.\n", + printk(KERN_ERR "PCI: %02x:%02x [%04x/%04x/%06x] has unknown header " + "type %02x, ignoring.\n", bus->number, dev->devfn, dev->vendor, dev->device, class, hdr_type); continue; @@ -373,7 +373,7 @@ unsigned int pci_scan_bus(struct pci_bus *bus) #endif /* Insert it into the tree of buses. */ if ((child = kmalloc(sizeof(*child), GFP_ATOMIC)) == 0) { - printk("PCI: out of memory for bridge.\n"); + printk(KERN_ERR "PCI: out of memory for bridge.\n"); continue; } memset(child, 0, sizeof(*child)); diff --git a/src/mainboard/leadtek/winfast6300/mainboard.c b/src/mainboard/leadtek/winfast6300/mainboard.c index d513e6420c..57cf14f1db 100644 --- a/src/mainboard/leadtek/winfast6300/mainboard.c +++ b/src/mainboard/leadtek/winfast6300/mainboard.c @@ -11,10 +11,9 @@ final_mainboard_fixup(void) void final_southbridge_fixup(void); void final_superio_fixup(void); + printk(KERN_INFO + "Winfast 6300 (and similar)..."); + final_southbridge_fixup(); final_superio_fixup(); - - printk(KERN_INFO - "Final mainboard fixup done for Winfast 6300 (and similar)\n"); - } diff --git a/src/mainboard/matsonic/ms7308e/mainboard.c b/src/mainboard/matsonic/ms7308e/mainboard.c index 7e27fd8753..94f8d65f6e 100644 --- a/src/mainboard/matsonic/ms7308e/mainboard.c +++ b/src/mainboard/matsonic/ms7308e/mainboard.c @@ -11,10 +11,9 @@ final_mainboard_fixup(void) void final_southbridge_fixup(void); void final_superio_fixup(void); + printk(KERN_INFO + "Matsonic MS7308E (and similar)"); + final_southbridge_fixup(); final_superio_fixup(); - - printk(KERN_INFO - "Final mainboard fixup done for Winfast 6300 (and similar)\n"); - } diff --git a/src/northsouthbridge/sis/630/southbridge.c b/src/northsouthbridge/sis/630/southbridge.c index cd4bd0f14c..d76c2f45b8 100644 --- a/src/northsouthbridge/sis/630/southbridge.c +++ b/src/northsouthbridge/sis/630/southbridge.c @@ -48,23 +48,23 @@ void nvram_on() pci_write_config_byte(pcidev, 0x40, 0x33); /* Flash can be flashed */ pci_write_config_byte(pcidev, 0x45, 0x40); - printk(KERN_INFO "Enabled in SIS 503 regs 0x40 and 0x45\n"); + DBG("Enabled in SIS 503 regs 0x40 and 0x45\n"); } - printk(KERN_INFO "Now try to turn off shadow\n"); + DBG("Now try to turn off shadow\n"); #ifdef USE_DOC_MIL /* turn off nvram shadow in 0xc0000 ~ 0xfffff, i.e. accessing segment C - F is actually to the DRAM not NVRAM. For 512KB NVRAM case, this one should be disabled */ pcidev = pci_find_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, (void *)NULL); - printk(KERN_INFO "device for SiS 630 is 0x%x\n", pcidev); + DBG("device for SiS 630 is 0x%x\n", pcidev); if (pcidev != NULL) { /* read cycle goes to System Memory */ pci_write_config_word(pcidev, 0x70, 0x1fff); /* write cycle goest to System Memory */ pci_write_config_word(pcidev, 0x72, 0x1fff); - printk(KERN_INFO "Shadow memory disabled in SiS 630\n"); + DBG("Shadow memory disabled in SiS 630\n"); } #endif @@ -109,21 +109,21 @@ acpi_fixup(void) // Set a base address for ACPI of 0xc000 pci_read_config_word(pcidev, 0x74, &temp); - printk(KERN_INFO "acpibase was 0x%x\n", temp); + DBG("acpibase was 0x%x\n", temp); pci_write_config_word(pcidev, 0x74, acpibase); pci_read_config_word(pcidev, 0x74, &temp); - printk(KERN_INFO "acpibase is 0x%x\n", temp); + DBG("acpibase is 0x%x\n", temp); // now enable acpi pci_read_config_byte(pcidev, 0x40, &val); - printk(KERN_INFO "acpi enable reg was 0x%x\n", val); + DBG("acpi enable reg was 0x%x\n", val); val |= 0x80; pci_write_config_byte(pcidev, 0x40, val); pci_read_config_byte(pcidev, 0x40, &val); - printk(KERN_INFO "acpi enable reg after set is 0x%x\n", val); - printk(KERN_INFO "acpi status: word at 0x56 is 0x%x\n", + DBG("acpi enable reg after set is 0x%x\n", val); + DBG("acpi status: word at 0x56 is 0x%x\n", inw(acpibase+0x56)); - printk(KERN_INFO "acpi status: byte at 0x4b is 0x%x\n", + DBG("acpi status: byte at 0x4b is 0x%x\n", inb(acpibase + 0x4b)); // now that it's on, get in there and call off the dogs. @@ -133,12 +133,12 @@ acpi_fixup(void) outb(0, acpibase + 0x4b); // ah ha! have to SET, NOT CLEAR! outb(0x40, acpibase + 0x56); - printk(KERN_INFO "acpibase + 0x56 is 0x%x\n", + DBG("acpibase + 0x56 is 0x%x\n", inb(acpibase+0x56)); val &= (~0x80); pci_write_config_byte(pcidev, 0x40, val); pci_read_config_byte(pcidev, 0x40, &val); - printk(KERN_INFO "acpi disable reg after set is 0x%x\n", val); + DBG("acpi disable reg after set is 0x%x\n", val); } else { printk(KERN_EMERG "Can't find south bridge!\n"); } @@ -177,5 +177,5 @@ final_southbridge_fixup() serial_irq_fixedup(); acpi_fixup(); - printk(KERN_INFO "Southbridge fixup done for SIS 503\n"); + DBG("Southbridge fixup done for SIS 503\n"); }