Emulation/switch-coreboot
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match settings per steve goodrich.

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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2329 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Ronald G. Minnich 2006-06-23 03:39:10 +00:00
parent 88fb1a6c37
commit 53a00b7138
1 changed files with 1 additions and 1 deletions
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2
src/northbridge/amd/gx2/northbridge.c
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@ -67,7 +67,7 @@ sizeram(void)
/* ram has none of this stuff */ /* ram has none of this stuff */
#define RAM_PROPERTIES (0) #define RAM_PROPERTIES (0)
#define DEVICE_PROPERTIES (WRITE_SERIALIZE|CACHE_DISABLE) #define DEVICE_PROPERTIES (WRITE_SERIALIZE|CACHE_DISABLE)
#define ROM_PROPERTIES (WRITE_SERIALIZE|WRITE_THROUGH) #define ROM_PROPERTIES (WRITE_SERIALIZE|WRITE_PROTECT|CACHE_DISABLE)
#define MSR_WS_CD_DEFAULT (0x21212121) #define MSR_WS_CD_DEFAULT (0x21212121)
/* 1810-1817 give you 8 registers with which to program protection regions */ /* 1810-1817 give you 8 registers with which to program protection regions */