UPSTREAM: soc/intel/skylake: Bump up bootblock size to 48K

When UART_DEBUG is enabled bootblock size grows more than the current
32K. Bump this up to 48K.

CQ-DEPEND=CL:374981,CL:373364
BUG=None
BRANCH=None
TEST=None

Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/16317
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

Change-Id: I580137dfdc9b4ad226c866f2b23b159bd820c62c
Reviewed-on: https://chromium-review.googlesource.com/374980
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Furquan Shaikh 2016-08-24 10:28:30 -07:00 committed by chrome-bot
parent f020befeb4
commit 45f9259e0d

View file

@ -99,7 +99,7 @@ config DCACHE_BSP_STACK_SIZE
config C_ENV_BOOTBLOCK_SIZE
hex
default 0x8000
default 0xC000
config EXCLUDE_NATIVE_SD_INTERFACE
bool