mirror of
https://github.com/fail0verflow/switch-coreboot.git
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reorg
This commit is contained in:
Ronald G. Minnich
parent
53deb608bc
commit
40e83c3b5e
2 changed files with 435 additions and 0 deletions
398
src/northsouthbridge/sis/630/ipl.S
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398
src/northsouthbridge/sis/630/ipl.S
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/*
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* ipl.S: Initial Program Loader (IPL) for SiS 630 and M-System DoC Millennium
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*
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*
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* Copyright 2000 Silicon Integrated System Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*
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* Reference:
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* 1. SiS 630 Specification
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* 2. System Management Bus Specification Rev 1.1
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* 3. PC SDRAM Serial Presence Detect (SPD) Specification Rev 1.2B
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* 4. Booting From the DiskOnChip Millennium
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*
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* $Id$
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*/
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#include "ipl.h"
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.code16
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#define SIZE_ALL
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#define REALLY_COMPACT
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sis630spd_start:
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cli # Disables the maskable
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# hardware interrupts.
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movw %cs, %ax # makes data segment ==
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movw %ax, %ds # code segment
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movw $0x408a, %ax # ACPI Enable.
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CALL_SP(write_lpc_register) # (for use of SMBus)
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movw $0x7550, %ax # Store ACPI Base Address.
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CALL_SP(write_lpc_register) # (for use of SMBus)
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movw $0x5501, %ax # Mode# enable, this bit
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CALL_SP(write_pci_register) # should be set before sizing.
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#ifdef SIZE_ALL
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xorw %bx, %bx # clear %fs, %fs is used as "bitmap" of
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movw %bx, %fs # install DIMM slot
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#endif /* SIZE_ALL */
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spd_sizing_start:
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#ifndef REALLY_COMPACT
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movw $0x0320, %ax # Issue an SMB_Kill command to
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CALL_BP(sis_set_smbus) # stop all SMBus operation
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#endif /* REALLY_COMPACT */
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movw $0x04a1, %ax # SPD is on SMBUS Address 1010 xyz1
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# where xyz are DIMM Slot Number
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#ifdef SIZE_ALL
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addb %bh, %al # FIXME, %bh == 0 ??
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addb %bh, %al # Select the DIMM to be SPD-sized.
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#endif /* SIZE_ALL*/
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CALL_BP(sis_set_smbus)
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movb $0x02, %al # Read the RAM Type (SPD byte 2)
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CALL_SP(read_spd) # of the dram on current DIMM.
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cmpb $0x04, %bl # If the RAM Type = SDRAM ??
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jne no_sdram # no, exit
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movb $0x03, %al # Read the Row number (SPD byte 3)
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CALL_SP(read_spd) # of the dram on current DIMM.
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movb %bl, %ch # save the Row number in CH.
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movb $0x04, %al # Read the Column number (SPD byte 4)
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CALL_SP(read_spd) # of the dram on current DIMM.
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movb %bl, %cl # Save the Column number in CL.
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movb $0x11, %al # Read the Bank number (SPD byte 17)
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CALL_SP(read_spd) # of the dram on current DIMM.
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#ifdef SIZE_ALL
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movb %bh, %ah # Save the current DIMM slot number in AH
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#endif
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cmpb $0x01, %bl
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je one_bank
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movw $sdram_type_bank_2, %si
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jmp check_row_column
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one_bank:
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movw $sdram_type_bank_1, %si
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check_row_column:
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#ifdef SAFTY_CHECK
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cmpb $0x0b, %ch # Row number too small, unsupported.
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jb no_sdram
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cmpb $0x0d, %ch # Row number too big, unsupported.
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jl no_sdram
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cmpb $0x08, %cl # Col number too small, unsupported.
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jb no_sdram
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cmpb $0x0b, %cl # Col number too big, unsupported.
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jl no_sdram
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#endif /* SAFTY_CHECK */
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subb $0x0b, %ch
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shlb $0x02, %ch # row * 4
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addb %ch, %cl # column + row *4
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movzbw %cl, %bx # Get the SDRAM type.
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addw %bx, %si
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movb -8(%si), %cl # sdram_type_bank[column + row *4]
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#ifdef SIZE_ALL
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movb %ah, %bh # Restore DIMM slot number from AH to BH
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#endif /* SIZE_ALL */
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#ifdef SAFTY_CHECK
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cmpb $0xff, %cl # SDRAM type supported ??
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je no_sdram # no, exit
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#endif /* SAFTY_CHECK */
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movb $0x05, %al # Read the Side number (SPD byte 5)
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CALL_SP(read_spd) # of the dram on current DIMM.
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cmpb $0x02, %bl # single or double sided ??
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jne single_side
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orb $0x20, %cl # set double side bit
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# (reg 0x60~0x62 bit 5)
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single_side:
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movb %cl, %al # store DRAM type in al
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movb $0x60, %ah # select register 0x60
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#ifdef SIZE_ALL
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addb %bh, %ah # select register 0x61, 0x62, accroding
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# to DIMM slot number (in BH)
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#endif /* SIZE_ALL */
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CALL_SP(write_pci_register) # write register 0x60~0x62 for each
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# DIMM slot
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#ifdef SIZE_ALL
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movw %fs, %ax # enable DIMMx on reg. 63h and save
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# it in FS
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movb $0x01, %bl
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movb %bh, %cl
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shlb %cl, %bl
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orb %bl, %al
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movw %ax, %fs
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no_sdram:
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incb %bh
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cmpb $0x03, %bh # total 3 DIMM slots supported
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jb spd_sizing_start
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movw %fs, %ax
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movb $0x63, %ah
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orb $0x90, %al # enable SMA 4 MB for VGA
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#else /* SIZE_ALL */
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no_sdram:
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movw $0x6391, %ax # enable SMA 4 MB for VGA
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#endif /* SIZE_ALL */
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CALL_SP(write_pci_register) # write register 0x63
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movw $pci_init_table, %si
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init_sdram:
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movb (%si), %ah
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testb %ah, %ah
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jz init_complete
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incw %si
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movb (%si), %al
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CALL_SP(write_pci_register)
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incw %si
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jmp init_sdram
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init_complete:
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sis630ipl_start:
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/* O.K. we have DRAM now, so set up STACK for CALL/RET */
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movw $DOC_STACK_SEG, %ax
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movw %ax, %ss
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movw $SPL_RAM_SEG, %ax
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movw %ax, %es
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movw $sis950_init_table, %si # enable flash write on
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movw $0x05, %cx # SiS 950 LPC
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movw $0x2e, %dx
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rep
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outsb
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movb $0xfc, %al
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outb %al, $0x2f
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xorw %sp, %sp # clear %sp
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xorw %dx, %dx # clear $dx, start of RAM
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movw $0x800, %si # point %si to CDSN Data area
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movw $0x1000, %di # point %di to CDSN Control area
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movw $DOC_SPL_START_BLK, %bp # start page of LinuxBIOS
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movb $0x84, %al # Reset DOC Millennium
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call doc_reset
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movb $0x85, %al # Turn into Normal Mode
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call doc_reset
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read_next_page:
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movw $0x1000, %di # point %di to CDSN Control area
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flash_command:
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movb $0x03, 0x04(%di) # start command cycle
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movb $0x00, (%si) # issue flash command Read00
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call doc_cycle_end
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movw %bp, %bx # %bp is current page number
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flash_address:
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shll $0x08, %ebx
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movw $0x03, %cx
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movb $0x05, 0x04(%di) # start address cycle
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0:
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movb %bl, (%si) # write address to CDSNIO
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shrw $0x08, %bx # shift next address byte
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loop 0b
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call doc_cycle_end
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wait_for_flash_ready:
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/* delay by reding NOP register before polling the FLASH READY bit,
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this is inlined to save a call/ret pair */
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doc_delay:
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movw $4, %cx
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0:
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movb 0x20(%di), %al # read DOC NOP retisger
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loop 0b # four times
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testb $0x80, 0x04(%di) # is flash ready ?
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jz wait_for_flash_ready
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movb 0x1d(%di), %al # init read pipeline
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movw $0x200, %cx # 1 page = 512 bytes
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movw $0x800, %si # point %si to CDSN Data area
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movw %dx, %di # restore saved current destination
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rep
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movsb
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movw %di, %dx # save current destination
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incw %bp # increse current page number
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cmpw $128, %bp # moved 63 KB ??
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jl read_next_page # no, read next page
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sis630ipl_end:
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jmp spl_vector # jump to SPL vector
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/* ------------------------------------------------------------------------------------------*/
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write_lpc_register:
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/* Input: AH - register number. AL - register value. */
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movl $LPC_BRIDGE_BASE_ADDR, %edx
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jmp write_common
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write_pci_register:
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/* Input: AH - register number. AL - register value. */
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movl $NORTH_BRIDGE_BASE_ADDR, %edx
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write_common:
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movw %ax, %cx # Save %ax to %cx.
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movzbl %ch, %eax # add register address to
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addl %edx, %eax # PCI base address
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movw $PCI_COMMAND_PORT, %dx
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outl %eax, %dx
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movw $PCI_DATA_PORT, %dx
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andb $0x03, %al
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addb %al, %dl
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movb %cl, %al
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outb %al, %dx
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RET_SP # End of write_[lpc|pci]_reg
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read_spd:
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/* Input: AH = 05h, AL = byte number of SPD to be read.
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Output: BL = The value of specified SPD byte. */
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movb $0x05, %ah
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CALL_BP(sis_set_smbus)
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movw $0x0312, %ax # Start, R/W byte Data
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CALL_BP(sis_set_smbus)
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wait_for_smbus_read:
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movb $0x80, %dl # Read SMBus status
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inb %dx, %al
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testb $0x02, %al # if device errors
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jnz read_spd_fail # then skip read SPD
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testb $0x08, %al # if not complete
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jz wait_for_smbus_read # then wait SPD data complete
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read_spd_fail:
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movb $0x08, %ah
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sis_get_smbus:
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/* Input: AH - register index.
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Output: AL - register value. */
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addb %ah, %dl # read SMBus byte 0
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inb %dx, %al
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movb %al, %bl # return result in BL
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movw $0x00ff, %ax
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CALL_BP(sis_set_smbus) # clear ACPI 80h status
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RET_SP # End of read_spd
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sis_set_smbus:
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/* Input: AH - register index. AL - register value. */
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movw $SMB_BASE_ADDR, %dx
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addb %ah, %dl
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outb %al, %dx
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RET_BP # End of sis_set_smbus
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doc_reset:
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/* Input: AL = value write to DOC_CONTROL register
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Clobberd: CX */
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movb %al, 0x02(%di) # write DoC Control retister
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movb %al, 0x02(%di) # twice
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ret # End of doc_reset
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doc_cycle_end:
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movb $0x00, 0x1e(%di) # flush write pepeline
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movb $0x01, 0x04(%di) # end command cycle
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ret
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sdram_type_bank_1:
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# Column Number 8 9 10 11 Row Number
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.byte 0b0000, 0b0100, 0b1000, 0xff # 11
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.byte 0xff, 0xff, 0xff, 0xff # 12
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.byte 0b0001, 0b0101, 0b1001, 0b1101 # 13
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sdram_type_bank_2:
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# Column Number 8 9 10 11 Row Number
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.byte 0b1100, 0xff, 0xff, 0xff # 11
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.byte 0b0010, 0b0110, 0b1010, 0b1110 # 12
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.byte 0b0011, 0b0111, 0b1011, 0b1111 # 13
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pci_init_table:
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# Reg. Value times
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# .byte 0x55, 0x01 #0x01
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# .byte 0x04, 0x05 #0x01
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#ifndef SIS630S
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.byte 0x8c, 0x66 # set Clock DLL control register
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.byte 0x8d, 0x66 # 0x8c ~ 0x8f,
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.byte 0x8e, 0x03 # these values are very M/B
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.byte 0x8f, 0x55 # specific
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#else /* SIS630S */
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.byte 0x8c, 0x27 # set Clock DLL control register
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.byte 0x8d, 0x77 # 0x8c ~ 0x8f,
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.byte 0x8e, 0x01 # these values are very M/B
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.byte 0x8f, 0x07 # specific
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#endif /* SIS630S */
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.byte 0x57, 0x80 #0x01
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.byte 0x57, 0x40 #0x01
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.byte 0x57, 0x20 #0x06
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.byte 0x57, 0x20 #0x06
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.byte 0x57, 0x20 #0x06
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# .byte 0x57, 0x20 #0x06
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# .byte 0x57, 0x20 #0x06
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# .byte 0x57, 0x20 #0x06
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.byte 0x52, 0x01 #0x01
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.byte 0x00 /* Null, End of table */
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.org 0x01f0
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reset_vector:
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.byte 0xea # jmp to fe00:0000, where IPL
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.word 0x0000, DOC_WIN_SEG # starts in DoC
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spl_vector:
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.byte 0xea # jmp to 8000:0000, where SPL
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.word 0x0000, SPL_RAM_SEG # (LinuxBIOS) starts in RAM
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sis950_init_table:
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.byte 0x87, 0x01, 0x55, 0x55, 0x24
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end:
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hlt
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37
src/northsouthbridge/sis/630/ipl.h
Normal file
37
src/northsouthbridge/sis/630/ipl.h
Normal file
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@ -0,0 +1,37 @@
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#define PCI_COMMAND_PORT 0xcf8
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#define PCI_DATA_PORT 0xcfc
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#define NORTH_BRIDGE_BASE_ADDR 0x80000000
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#define LPC_BRIDGE_BASE_ADDR 0x80000800
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#define SMB_BASE_ADDR 0x5080
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#define DOC_WIN_SEG 0xfe00
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#define DOC_STACK_SEG 0x0400
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#define SPL_RAM_SEG 0x8000
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#define DOC_SPL_START_BLK 2 /* 0,1 for IPL */
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#define DOC_SPL_SIZE_IN_PAGE 126 /* 1 page = 512 bytes, 256k */
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#define RET_LABEL(label) \
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jmp label##_done
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#define CALL_LABEL(label) \
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jmp label ;\
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label##_done:
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#define CALL_SP(func) \
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lea 0f, %sp ; \
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jmp func ; \
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0:
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#define RET_SP \
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jmp *%sp
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#define CALL_BP(func) \
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lea 0f, %bp ; \
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jmp func ; \
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0:
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#define RET_BP \
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jmp *%bp
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