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UPSTREAM: nb/intel/x4x: Make raminit less verbose with CONFIG_DEBUG_RAM_SETUP

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Hides JEDEC steps using the RAM_SPEW macro.

Also hides a hexdump of SPDs.

BUG=none
BRANCH=none
TEST=none

Change-Id: I9367a693d565076be2740948a892d0aa3bbdba1a
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: cfa2eaa4cc
Original-Change-Id: Ie2b484cf1f1d296823df0473e852d9d07ca20246
Original-Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Original-Reviewed-on: https://review.coreboot.org/18924
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://chromium-review.googlesource.com/510766
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
This commit is contained in:
Arthur Heymans 2017-03-20 16:32:07 +01:00 • committed by chrome-bot
parent 02783f0dab
commit 3b6a0a93ba
2 changed files with 6 additions and 3 deletions
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5
src/northbridge/intel/x4x/raminit.c
View file

@ -55,9 +55,12 @@ static void sdram_read_spds(struct sysinfo *s)
if (j == 62)
s->dimms[i].card_type = ((u8) status) & 0x1f;
}
if (status >= 0)
if (status >= 0) {
if (IS_ENABLED(CONFIG_DEBUG_RAM_SETUP))
hexdump(s->dimms[i].spd_data, 64);
}
}
s->spd_type = 0;
int fail = 1;

2
src/northbridge/intel/x4x/raminit_ddr2.c
View file

@ -1185,7 +1185,7 @@ static void jedec_ddr2(struct sysinfo *s)
}
dojedec_ddr2(r + ch*4, ch, jedec[i][0], v);
udelay(1);
//printk(BIOS_DEBUG, "Jedec step %d\n", i);
printk(RAM_SPEW, "Jedec step %d\n", i);
}
}
printk(BIOS_DEBUG, "MRS done\n");