From 3924faa481d165fac5bc8fb13abd9bdd60e8229e Mon Sep 17 00:00:00 2001 From: Andre Heider Date: Wed, 21 Feb 2018 16:24:10 +0100 Subject: [PATCH] get in shape Change-Id: I6c9cfcc91a89883462a57ec490fea6463565bb29 --- src/mainboard/nintendo/Kconfig | 2 +- src/mainboard/nintendo/switch/Kconfig | 6 +- src/mainboard/nintendo/switch/Makefile.inc | 1 + .../nintendo/switch/bct/Makefile.inc | 1 + src/mainboard/nintendo/switch/bootblock.c | 2 +- src/mainboard/nintendo/switch/cbfs_switch.c | 57 +++++++++++-------- src/mainboard/nintendo/switch/devicetree.cb | 2 +- src/mainboard/nintendo/switch/mainboard.c | 1 + src/mainboard/nintendo/switch/pmic.c | 1 + src/mainboard/nintendo/switch/reset.c | 3 + src/mainboard/nintendo/switch/romstage.c | 1 + src/mainboard/nintendo/switch/sdram_configs.c | 3 +- src/soc/nvidia/tegra210/Kconfig | 2 +- src/soc/nvidia/tegra210/Makefile.inc | 2 +- 14 files changed, 50 insertions(+), 34 deletions(-) diff --git a/src/mainboard/nintendo/Kconfig b/src/mainboard/nintendo/Kconfig index 3409e04494..c3d4c0da77 100644 --- a/src/mainboard/nintendo/Kconfig +++ b/src/mainboard/nintendo/Kconfig @@ -1,7 +1,7 @@ ## ## This file is part of the coreboot project. ## -## Copyright (C) 2012 The ChromiumOS Authors +## Copyright 2018 Andre Heider ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by diff --git a/src/mainboard/nintendo/switch/Kconfig b/src/mainboard/nintendo/switch/Kconfig index 728255e084..c5fa6941d1 100644 --- a/src/mainboard/nintendo/switch/Kconfig +++ b/src/mainboard/nintendo/switch/Kconfig @@ -1,7 +1,7 @@ ## ## This file is part of the coreboot project. ## -## Copyright 2015 Google Inc. +## Copyright 2018 Andre Heider ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by @@ -15,7 +15,7 @@ if BOARD_NINTENDO_SWITCH -config BOARD_SPECIFIC_OPTIONS # dummy +config BOARD_SPECIFIC_OPTIONS def_bool y select BOARD_ROMSIZE_KB_16384 select MAINBOARD_HAS_NATIVE_VGA_INIT @@ -23,7 +23,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select SOC_NVIDIA_TEGRA210 select MAINBOARD_DO_DSI_INIT -config BOOTBLOCK_WRAP_BCT +config BCT_BOOT def_bool n config MAINBOARD_DIR diff --git a/src/mainboard/nintendo/switch/Makefile.inc b/src/mainboard/nintendo/switch/Makefile.inc index 1c62469f3f..e480159c13 100644 --- a/src/mainboard/nintendo/switch/Makefile.inc +++ b/src/mainboard/nintendo/switch/Makefile.inc @@ -1,6 +1,7 @@ ## ## This file is part of the coreboot project. ## +## Copyright 2018 Andre Heider ## Copyright 2015 Google Inc. ## ## This program is free software; you can redistribute it and/or modify diff --git a/src/mainboard/nintendo/switch/bct/Makefile.inc b/src/mainboard/nintendo/switch/bct/Makefile.inc index 24e676ab38..0847708321 100644 --- a/src/mainboard/nintendo/switch/bct/Makefile.inc +++ b/src/mainboard/nintendo/switch/bct/Makefile.inc @@ -1,6 +1,7 @@ ## ## This file is part of the coreboot project. ## +## Copyright 2018 Andre Heider ## Copyright 2015 Google Inc. ## Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. ## diff --git a/src/mainboard/nintendo/switch/bootblock.c b/src/mainboard/nintendo/switch/bootblock.c index c29568bf71..5b90daec0c 100644 --- a/src/mainboard/nintendo/switch/bootblock.c +++ b/src/mainboard/nintendo/switch/bootblock.c @@ -113,7 +113,7 @@ void bootblock_mainboard_init(void) soc_configure_funits(funits, ARRAY_SIZE(funits)); - /* PMIC */ + /* Reset PMIC so it works as expected on a warmboot */ info->reset_func(info->reset_bit); i2c_init(I2CPWR_BUS); pmic_init(I2CPWR_BUS); diff --git a/src/mainboard/nintendo/switch/cbfs_switch.c b/src/mainboard/nintendo/switch/cbfs_switch.c index 8868500ad5..464b7052d8 100644 --- a/src/mainboard/nintendo/switch/cbfs_switch.c +++ b/src/mainboard/nintendo/switch/cbfs_switch.c @@ -19,23 +19,18 @@ #include "cbfs_switch.h" -#define UINT32TOBUF(b, o, val) \ - do { \ - b[o + 0] = (val >> 24) & 0xff; \ - b[o + 1] = (val >> 16) & 0xff; \ - b[o + 2] = (val >> 8) & 0xff; \ - b[o + 3] = val & 0xff; \ - } while (0); - -extern u8 _usb_bounce[]; -extern u8 _eusb_bounce[]; +extern uint8_t _usb_bounce[]; +extern uint8_t _eusb_bounce[]; #define _usb_bounce_size (_eusb_bounce - _usb_bounce) -extern u8 _rom_copy[]; -extern u8 _erom_copy[]; +extern uint8_t _rom_copy[]; +extern uint8_t _erom_copy[]; #define _rom_copy_size (_erom_copy - _rom_copy) -typedef struct { +#define BOOTROM_RCM_TRANSPORT_ADDR 0x40003114 + +/* The RCM struct of the BootROM */ +static const struct { char is_usb3; char init_hw_done; char init_proto_done; @@ -53,30 +48,38 @@ typedef struct { int (*ep1_in_imm)(void *buffer, uint32_t size, uint32_t *num_xfer); void *ep0_stall; -} rcm_transport_t; +} *rcm_transport = (void *)BOOTROM_RCM_TRANSPORT_ADDR; -static const rcm_transport_t *rcm_transport = (rcm_transport_t *)0x40003114; - -static u32 rom_recvbuf(void *buffer, u32 size) { - u32 num_xfer; +static uint32_t rom_recvbuf(void *buffer, uint32_t size) +{ + uint32_t num_xfer; rcm_transport->ep1_out_imm(buffer, size, &num_xfer); return num_xfer; } -static u32 rom_sendbuf(void *buffer, u32 size) { - u32 num_xfer; +static uint32_t rom_sendbuf(void *buffer, uint32_t size) +{ + uint32_t num_xfer; rcm_transport->ep1_in_imm(buffer, size, &num_xfer); return num_xfer; } +static void bounce_bewrite32(uint32_t offset, uint32_t value) +{ + _usb_bounce[offset + 0] = (value >> 24) & 0xff; + _usb_bounce[offset + 1] = (value >> 16) & 0xff; + _usb_bounce[offset + 2] = (value >> 8) & 0xff; + _usb_bounce[offset + 3] = value & 0xff; +} + static ssize_t usb_readat(const struct region_device *rd, void *b, - size_t offset, size_t size) + size_t offset, size_t size) { size_t left = size; size_t chunk; - UINT32TOBUF(_usb_bounce, 0, offset); - UINT32TOBUF(_usb_bounce, 4, size); + bounce_bewrite32(0, offset); + bounce_bewrite32(4, size); rom_sendbuf(_usb_bounce, 8); while (left > 0) { @@ -98,14 +101,17 @@ static const struct region_device_ops usb_ops = { .mmap = mmap_helper_rdev_mmap, .munmap = mmap_helper_rdev_munmap, .readat = usb_readat, -} -; +}; + static struct mmap_helper_region_device mdev_usb = MMAP_HELPER_REGION_INIT(&usb_ops, 0, CONFIG_ROM_SIZE); static struct mem_region_device mdev_sdram = MEM_REGION_DEV_RO_INIT(_rom_copy, CONFIG_ROM_SIZE); +/* romstage start out with USB but switches to SDRAM. + * ramstage uses SDRAM backed CBFS exclusively. + */ #if ENV_RAMSTAGE static bool rom_in_sdram = true; #else @@ -116,6 +122,7 @@ void cbfs_switch_to_sdram(void) { usb_readat(&mdev_usb.rdev, _rom_copy, 0, CONFIG_ROM_SIZE); + /* Signal host with offset=0 and length=0 that we're done. */ memset(_usb_bounce, 0, 8); rom_sendbuf(_usb_bounce, 8); diff --git a/src/mainboard/nintendo/switch/devicetree.cb b/src/mainboard/nintendo/switch/devicetree.cb index a18229b7aa..114df86ade 100644 --- a/src/mainboard/nintendo/switch/devicetree.cb +++ b/src/mainboard/nintendo/switch/devicetree.cb @@ -1,7 +1,7 @@ ## ## This file is part of the coreboot project. ## -## Copyright 2015 Google Inc. +## Copyright 2018 Andre Heider ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by diff --git a/src/mainboard/nintendo/switch/mainboard.c b/src/mainboard/nintendo/switch/mainboard.c index e1d6fa81f0..7f376fd567 100644 --- a/src/mainboard/nintendo/switch/mainboard.c +++ b/src/mainboard/nintendo/switch/mainboard.c @@ -1,6 +1,7 @@ /* * This file is part of the coreboot project. * + * Copyright 2018 Andre Heider * Copyright 2015 Google Inc. * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. * diff --git a/src/mainboard/nintendo/switch/pmic.c b/src/mainboard/nintendo/switch/pmic.c index c6e938d076..b44194b9d2 100644 --- a/src/mainboard/nintendo/switch/pmic.c +++ b/src/mainboard/nintendo/switch/pmic.c @@ -1,6 +1,7 @@ /* * This file is part of the coreboot project. * + * Copyright 2018 Andre Heider * Copyright 2015 Google Inc. * Copyright (c) 2013-2015, NVIDIA CORPORATION. All rights reserved. * diff --git a/src/mainboard/nintendo/switch/reset.c b/src/mainboard/nintendo/switch/reset.c index 794b1db90b..bca8b30a91 100644 --- a/src/mainboard/nintendo/switch/reset.c +++ b/src/mainboard/nintendo/switch/reset.c @@ -1,6 +1,7 @@ /* * This file is part of the coreboot project. * + * Copyright 2018 Andre Heider * Copyright 2015 Google Inc. * * This program is free software; you can redistribute it and/or modify @@ -24,6 +25,7 @@ #define PMC_SCRATCH0 0x050 #define PMC_SCRATCH0_MODE_RCM (1 << 1) +/* We started with RCM, and that's where we go back again. */ void do_hard_reset(void) { uint32_t val; @@ -37,6 +39,7 @@ void do_hard_reset(void) write32(PMC_CTLR_BASE + PMC_CNTRL, val); } +/* Make die() go back to RCM too. */ void die_notify(void) { do_hard_reset(); diff --git a/src/mainboard/nintendo/switch/romstage.c b/src/mainboard/nintendo/switch/romstage.c index e741caf357..7d42097be9 100644 --- a/src/mainboard/nintendo/switch/romstage.c +++ b/src/mainboard/nintendo/switch/romstage.c @@ -1,6 +1,7 @@ /* * This file is part of the coreboot project. * + * Copyright 2018 Andre Heider * Copyright 2015 Google Inc. * * This program is free software; you can redistribute it and/or modify diff --git a/src/mainboard/nintendo/switch/sdram_configs.c b/src/mainboard/nintendo/switch/sdram_configs.c index f00aa9a72f..58e7f3f89f 100644 --- a/src/mainboard/nintendo/switch/sdram_configs.c +++ b/src/mainboard/nintendo/switch/sdram_configs.c @@ -1,6 +1,7 @@ /* * This file is part of the coreboot project. * + * Copyright 2018 Andre Heider * Copyright 2014 Google Inc. * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. * @@ -33,7 +34,7 @@ static const struct sdram_params sdram_configs[] = { static uint32_t switch_sdram_get_id(void) { - return (read32(FUSE_BASE + FUSE_RESERVED_ODM4) & 0x38) >> 3; + return (read32(FUSE_BASE + FUSE_RESERVED_ODM4) >> 3) & 7; } const struct sdram_params *get_sdram_config() diff --git a/src/soc/nvidia/tegra210/Kconfig b/src/soc/nvidia/tegra210/Kconfig index fe8991068e..01269b2eab 100644 --- a/src/soc/nvidia/tegra210/Kconfig +++ b/src/soc/nvidia/tegra210/Kconfig @@ -17,7 +17,7 @@ config SOC_NVIDIA_TEGRA210 if SOC_NVIDIA_TEGRA210 -config BOOTBLOCK_WRAP_BCT +config BCT_BOOT def_bool y config VBOOT diff --git a/src/soc/nvidia/tegra210/Makefile.inc b/src/soc/nvidia/tegra210/Makefile.inc index 81a47d25a6..5571877551 100644 --- a/src/soc/nvidia/tegra210/Makefile.inc +++ b/src/soc/nvidia/tegra210/Makefile.inc @@ -101,7 +101,7 @@ rmodules_arm-y += monotonic_timer.c CPPFLAGS_common += -Isrc/soc/nvidia/tegra210/include/ -ifeq ($(CONFIG_BOOTBLOCK_WRAP_BCT),y) +ifeq ($(CONFIG_BCT_BOOT),y) # We want to grab the bootblock right before it goes into the image and wrap # it inside a BCT, but ideally we would do that without making special, one # use modifications to the main ARM Makefile. We do this in two ways. First,