Whitespace fixes, readability improvements.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@916 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Carl-Daniel Hailfinger 2008-10-11 01:01:07 +00:00
parent 3bb18f8a3c
commit 352c1b563b
3 changed files with 9 additions and 16 deletions

View file

@ -64,7 +64,6 @@ config CPU_VIA_C7
arch/x86/Makefile for more hints on possible values.
It is usually set in mainboard/*/Kconfig.
config CONFIG_HPET
boolean
depends CPU_AMD_K8

View file

@ -69,21 +69,15 @@ __protected_stage0:
.align 4
/* We will use 4Kbytes only for cache as ram. This is
* enough to fit in our stack.
*
* disable HyperThreading is done by eswar
/* disable HyperThreading is done by eswar
* the other is very similar to the AMD CAR, except remove amd specific msr
*/
#define CacheSize CONFIG_CARSIZE
#define CacheBase CONFIG_CARBASE
#define ASSEMBLY
#include "mtrr.h"
#include <mtrr.h>
/* Save the BIST result */
movl %eax, %ebp
@ -175,6 +169,7 @@ NotHtProcessor:
/* Clear all MTRRs */
xorl %edx, %edx
movl $fixed_mtrr_msr, %esi
clear_fixed_var_mtrr:
lodsl (%esi), %eax
testl %eax, %eax
@ -331,8 +326,7 @@ clear_fixed_var_mtrr_out:
lout:
/* Store zero for the pointer to the global variables. */
movl $0, %eax
pushl %eax
pushl $0
/* Restore the BIST result. */
movl %ebp, %eax