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Whitespace fixes, readability improvements.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://coreboot.org/repository/coreboot-v3@916 f3766cd6-281f-0410-b1cd-43a5c92072e9
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3bb18f8a3c
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3 changed files with 9 additions and 16 deletions
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@ -64,7 +64,6 @@ config CPU_VIA_C7
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arch/x86/Makefile for more hints on possible values.
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arch/x86/Makefile for more hints on possible values.
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It is usually set in mainboard/*/Kconfig.
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It is usually set in mainboard/*/Kconfig.
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config CONFIG_HPET
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config CONFIG_HPET
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boolean
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boolean
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depends CPU_AMD_K8
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depends CPU_AMD_K8
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@ -69,21 +69,15 @@ __protected_stage0:
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.align 4
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.align 4
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/* disable HyperThreading is done by eswar
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/* We will use 4Kbytes only for cache as ram. This is
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* enough to fit in our stack.
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*
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* disable HyperThreading is done by eswar
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* the other is very similar to the AMD CAR, except remove amd specific msr
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* the other is very similar to the AMD CAR, except remove amd specific msr
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*/
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*/
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#define CacheSize CONFIG_CARSIZE
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#define CacheSize CONFIG_CARSIZE
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#define CacheBase CONFIG_CARBASE
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#define CacheBase CONFIG_CARBASE
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#define ASSEMBLY
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#define ASSEMBLY
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#include "mtrr.h"
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#include <mtrr.h>
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/* Save the BIST result */
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/* Save the BIST result */
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movl %eax, %ebp
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movl %eax, %ebp
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@ -175,6 +169,7 @@ NotHtProcessor:
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/* Clear all MTRRs */
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/* Clear all MTRRs */
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xorl %edx, %edx
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xorl %edx, %edx
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movl $fixed_mtrr_msr, %esi
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movl $fixed_mtrr_msr, %esi
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clear_fixed_var_mtrr:
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clear_fixed_var_mtrr:
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lodsl (%esi), %eax
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lodsl (%esi), %eax
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testl %eax, %eax
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testl %eax, %eax
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@ -331,8 +326,7 @@ clear_fixed_var_mtrr_out:
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lout:
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lout:
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/* Store zero for the pointer to the global variables. */
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/* Store zero for the pointer to the global variables. */
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movl $0, %eax
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pushl $0
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pushl %eax
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/* Restore the BIST result. */
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/* Restore the BIST result. */
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movl %ebp, %eax
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movl %ebp, %eax
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