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UPSTREAM: lib/spd_bin: make SMBus SPD addresses an input

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Instead of assuming the mapping of dimm number to SPD SMBus address,
allow the mainboard to provide its own mapping. That way, global
resources of empty SPD contents aren't wasted in order to address
a dimm on a mainboard that doesn't meet the current assumption.

BUG=none
BRANCH=none
TEST=none

Change-Id: I1ef87d18b30192be730805238df62ff81f130339
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: dd82edc388
Original-Change-Id: Id0e79231dc2303373badaae003038a1ac06a5635
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/19915
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-by: Naresh Solanki <naresh.solanki@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/517936
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
This commit is contained in:
Aaron Durbin 2017-05-25 09:36:06 -05:00 • committed by chrome-bot
parent 6b809726d2
commit 33c3dd80e8
4 changed files with 8 additions and 3 deletions
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1
src/include/spd_bin.h
View file

@ -43,6 +43,7 @@
#define LPDDR4_SPD_PART_LEN 20
struct spd_block {
u8 addr_map[CONFIG_DIMM_MAX];
u8 *spd_array[CONFIG_DIMM_MAX];
/* Length of each dimm */
u16 len;

2
src/lib/spd_bin.c
View file

@ -159,7 +159,7 @@ void get_spd_smbus(struct spd_block *blk)
for (i = 0 ; i < CONFIG_DIMM_MAX; i++) {
get_spd(spd_data_ptr + i * CONFIG_DIMM_SPD_SIZE,
0xA0 + (i << 1));
blk->addr_map[i]);
blk->spd_array[i] = spd_data_ptr + i * CONFIG_DIMM_SPD_SIZE;
}

4
src/mainboard/google/fizz/romstage.c
View file

@ -31,7 +31,9 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
memcpy(&mem_cfg->RcompTarget, rcomp_target, sizeof(rcomp_target));
/* Read spd block to get memory config */
struct spd_block blk;
struct spd_block blk = {
.addr_map = { 0xa0, 0xa4, },
};
mem_cfg->DqPinsInterleaved = 1;
get_spd_smbus(&blk);
mem_cfg->MemorySpdDataLen = blk.len;

4
src/mainboard/intel/kblrvp/romstage.c
View file

@ -50,7 +50,9 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
/* Memory leak is ok since we have memory mapped boot media */
mem_cfg->MemorySpdPtr00 = (uintptr_t)rdev_mmap_full(&spd_rdev);
} else { /* for CONFIG_BOARD_INTEL_KBLRVP7 */
struct spd_block blk;
struct spd_block blk = {
.addr_map = { 0xa0, 0xa2, 0xa4, 0xa6, },
};
mem_cfg->DqPinsInterleaved = 1;
get_spd_smbus(&blk);