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UPSTREAM: northbridge/amd/amdk8/raminit_f_dqs.c: Improve code formatting

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BUG=None
BRANCH=None
TEST=None

Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16600
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>

Change-Id: Ib1f9926ced1fd382c782f5098eb1ad98330cf655
Reviewed-on: https://chromium-review.googlesource.com/385910
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Elyes HAOUAS 2016-09-13 21:39:17 +02:00 • committed by chrome-bot
parent d30f6e5708
commit 32d4089d4d
1 changed files with 44 additions and 44 deletions
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8
src/northbridge/amd/amdk8/raminit_f_dqs.c
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@ -647,9 +647,9 @@ static unsigned TrainRcvrEn(const struct mem_controller *ctrl, unsigned Pass, st
if (RcvrEnDly & 1) {
/* Odd steps get another pattern such that even
and odd steps alternate.
The pointers to the patterns will be swapped
at the end of the loop so they are correspond
* and odd steps alternate.
* The pointers to the patterns will be swapped
* at the end of the loop so they are correspond
*/
PatternA = 1;
PatternB = 0;
@ -670,7 +670,7 @@ static unsigned TrainRcvrEn(const struct mem_controller *ctrl, unsigned Pass, st
}
/* Program the MaxAsyncLat filed with the
current DQS receiver enable setting plus 6ns
* current DQS receiver enable setting plus 6ns
*/
/* Program MaxAsyncLat to correspond with current delay */
SetMaxAL_RcvrDly(ctrl, RcvrEnDly);