From 2b83a9c1584d3848315fb96b462a89175dfb3a17 Mon Sep 17 00:00:00 2001 From: "Ronald G. Minnich" Date: Wed, 13 Aug 2008 02:44:46 +0000 Subject: [PATCH] The change to Kconfig is self-acked. Add a depend clause so that we don't see these things on Geode. Signed-off-by: Ronald G. Minnich Acked-by: Ronald G. Minnich The other changes are: Signed-off-by: Ronald G. Minnich Acked-by: Carl-Daniel Hailfinger git-svn-id: svn://coreboot.org/repository/coreboot-v3@753 f3766cd6-281f-0410-b1cd-43a5c92072e9 --- arch/x86/Kconfig | 2 ++ arch/x86/Makefile | 2 +- arch/x86/resourcemap.c | 6 ++---- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index f04413e7eb..49f1eb8501 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -133,6 +133,7 @@ config SMP config IOAPIC boolean + depends ARCH_X86 default 0 help If you want to configure an IOAPIC, set this. @@ -209,5 +210,6 @@ config USBDEBUG_DIRECT config APIC_ID_OFFSET hex "APIC ID offset" default 0x10 + depends IO_APIC help This is entirely mainboard dependent. 0x10 is a *typical* setting but not always a good setting. diff --git a/arch/x86/Makefile b/arch/x86/Makefile index ef5ea883a3..6ac4f4d837 100644 --- a/arch/x86/Makefile +++ b/arch/x86/Makefile @@ -183,7 +183,7 @@ STAGE2_LIB_SRC = stage2.c clog2.c mem.c tables.c delay.c \ compute_ip_checksum.c string.c STAGE2_ARCH_X86_SRC = archtables.c coreboot_table.c udelay_io.c -STAGE2_ARCH_X86_SRC += pci_ops_auto.c pci_ops_conf1.c +STAGE2_ARCH_X86_SRC += pci_ops_auto.c STAGE2_ARCH_X86_SRC += keyboard.c i8259.c isa-dma.c ifeq ($(CONFIG_PIRQ_TABLE),y) diff --git a/arch/x86/resourcemap.c b/arch/x86/resourcemap.c index deac46d15b..960e69ad9f 100644 --- a/arch/x86/resourcemap.c +++ b/arch/x86/resourcemap.c @@ -47,8 +47,6 @@ /* NOTE: By doing the config write in this manner we guarantee that this * will work in stage1 or stage2. */ -#define pci_read_config32(busdevfn, where) pci_cf8_conf1.read32(busdevfn, where) -#define pci_write_config32(busdevfn, where, what) pci_cf8_conf1.write32(busdevfn, where, what) void setup_resource_map_x_offset(const struct rmap *rm, u32 max, u32 offset_bdf, u32 offset_pciio, @@ -77,10 +75,10 @@ void setup_resource_map_x_offset(const struct rmap *rm, u32 max, dev <<= 3; dev |= rm->pcm.fn; dev += offset_devfn; - reg = pci_read_config32(PCI_BDEVFN(rm->pcm.bus + offset_bus, dev), where); + reg = pci_conf1_read_config32(PCI_BDEVFN(rm->pcm.bus + offset_bus, dev), where); reg &= rm->pcm.and; reg |= rm->pcm.or + offset_pciio; - pci_write_config32(PCI_BDEVFN(rm->pcm.bus + offset_bus, dev), where, reg); + pci_conf1_write_config32(PCI_BDEVFN(rm->pcm.bus + offset_bus, dev), where, reg); } break; case TIO8: