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https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
Various cosmetic fixes, added Doxygen comments (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://coreboot.org/repository/coreboot-v3@634 f3766cd6-281f-0410-b1cd-43a5c92072e9
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2 changed files with 71 additions and 40 deletions
14
lib/ram.c
14
lib/ram.c
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@ -33,10 +33,11 @@ void ram_failure(const char *why)
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hlt();
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}
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/* Northbridge or memory controller code must define these functions */
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/* Northbridge or memory controller code must define these functions. */
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void ram_set_registers(void *ctrl, int i);
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int ram_set_spd_registers(void *ctrl, int i);
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void ram_enable(int controllers, void *ctrl);
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/**
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* ram_initialize() is is the main RAM init function.
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*
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@ -45,10 +46,11 @@ void ram_enable(int controllers, void *ctrl);
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* of making it an empty function.
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*
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* @param controllers How many memory controllers there are.
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* @param ctrl Pointer to the mem control structure. This is a generic pointer, since the
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* structure is wholly chip-dependent, and a survey of all the types makes it clear that a common
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* struct is not possible. We can not use the device tree here as this code is run before the device tree
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* is available.
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* @param ctrl Pointer to the mem control structure. This is a generic pointer,
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* since the structure is wholly chip-dependent, and a survey of
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* all the types makes it clear that a common struct is not
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* possible. We can not use the device tree here as this code is
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* run before the device tree is available.
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*/
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void ram_initialize(int controllers, void *ctrl)
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{
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@ -61,7 +63,7 @@ void ram_initialize(int controllers, void *ctrl)
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ram_set_registers(ctrl, i);
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}
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/* Now setup those things we can auto detect. */
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/* Now setup those things we can auto-detect via SPD. */
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for (i = 0; i < controllers; i++) {
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printk(BIOS_INFO,
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"Setting SPD based registers of RAM controller %d\n", i);
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@ -23,7 +23,12 @@
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#include <lib.h>
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#include <console.h>
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/**
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* Write a value into memory.
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*
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* @param addr The memory address to write to.
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* @param value The value to write into the specified memory address.
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*/
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static void write_phys(unsigned long addr, unsigned long value)
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{
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volatile unsigned long *ptr;
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@ -31,6 +36,12 @@ static void write_phys(unsigned long addr, unsigned long value)
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*ptr = value;
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}
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/**
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* Read a value from memory.
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*
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* @param addr The memory address to read from.
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* @return The value read from the specified memory address.
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*/
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static unsigned long read_phys(unsigned long addr)
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{
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volatile unsigned long *ptr;
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@ -38,71 +49,89 @@ static unsigned long read_phys(unsigned long addr)
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return *ptr;
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}
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/**
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* Fill the specified RAM area.
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*
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* The data which is written into RAM is the address of each memory location.
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* E.g., we write a value of 0x1234 into address 0x1234, we write 0x1235 into
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* memory address 0x1235, and so on.
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*
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* @param start The beginning of the RAM area.
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* @param stop The end of the RAM area.
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*/
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static void ram_fill(unsigned long start, unsigned long stop)
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{
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unsigned long addr;
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/*
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* Fill.
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*/
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printk(BIOS_DEBUG, "DRAM fill: %lx-%lx\n", start, stop);
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for(addr = start; addr < stop ; addr += 4) {
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/* Display address being filled */
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if (!(addr & 0xffff)) {
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for (addr = start; addr < stop; addr += 4) {
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/* Display address being filled. */
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if (!(addr & 0xffff))
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printk(BIOS_DEBUG, "%lx\r", addr);
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}
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write_phys(addr, addr);
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};
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/* Display final address */
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printk(BIOS_DEBUG, "%lx\nDRAM filled\n", addr);
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/* Display final address. */
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printk(BIOS_DEBUG, "%lx\nDRAM filled.\n", addr);
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}
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/**
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* Verify the specified RAM area.
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*
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* This checks whether the specified RAM locations return the "correct" data
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* as written by ram_fill(). The value at address 0x1234 for example should
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* be 0x1234, the value of address 0x1235 should be 0x1235, and so on.
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*
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* @param start The beginning of the RAM area.
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* @param stop The end of the RAM area.
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*/
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static void ram_verify(unsigned long start, unsigned long stop)
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{
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unsigned long addr;
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unsigned long addr, value;
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int i = 0;
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/*
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* Verify.
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*/
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printk(BIOS_DEBUG, "DRAM verify: %lx-%lx\n", start, stop);
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for(addr = start; addr < stop ; addr += 4) {
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unsigned long value;
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/* Display address being tested */
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if (!(addr & 0xffff)) {
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for (addr = start; addr < stop; addr += 4) {
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/* Display address being tested. */
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if (!(addr & 0xffff))
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printk(BIOS_DEBUG, "%lx\r", addr);
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}
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value = read_phys(addr);
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if (value != addr) {
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/* Display address with error */
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/* Display address with error. */
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printk(BIOS_ERR, "Fail @%lx Read value=%lx\n",
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addr, value);
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i++;
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if(i>256) {
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/* Abort after 256 verify errors. */
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if (i > 256) {
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printk(BIOS_ERR, "Aborting.\n");
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break;
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}
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}
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}
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/* Display final address */
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/* Display final address. */
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printk(BIOS_DEBUG, "%lx\r", addr);
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if (i) {
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printk(BIOS_DEBUG, "\nDRAM did _NOT_ verify!\n");
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}
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else {
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} else {
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printk(BIOS_DEBUG, "\nDRAM range verified.\n");
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}
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}
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/**
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* Check whether the specified RAM area verifies correctly, and thus whether
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* we can be reasonably confident that our DRAM setup is correct.
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*
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* This is much more of a "Is my DRAM properly configured?" test than
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* a "Is my DRAM faulty?" test, though.
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*
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* @param start The beginning of the RAM area.
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* @param stop The end of the RAM area.
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*/
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void ram_check(unsigned long start, unsigned long stop)
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{
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/*
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* This is much more of a "Is my DRAM properly configured?"
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* test than a "Is my DRAM faulty?" test. Not all bits
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* are tested. -Tyson
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*/
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printk(BIOS_DEBUG, "Testing DRAM: %lx-%lx\n", start, stop);
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ram_fill(start, stop);
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ram_verify(start, stop);
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printk(BIOS_DEBUG, "Done.\n");
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}
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