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https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
UPSTREAM: soc/marvell/mvmap2315: Add gpio driver
Testing: booted successfully. BUG=None BRANCH=None TEST=None Signed-off-by: Hakim Giydan <hgiydan@marvell.com> Reviewed-on: https://review.coreboot.org/15508 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Change-Id: I89dee1bbf8b68460897f64bf673b328533e70cd4 Reviewed-on: https://chromium-review.googlesource.com/384979 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
parent
3615c1b6b2
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4 changed files with 176 additions and 0 deletions
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@ -19,6 +19,7 @@ bootblock-y += bootblock.c
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bootblock-y += clock.c
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bootblock-y += fiq.S
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bootblock-y += gic.c
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bootblock-y += gpio.c
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bootblock-y += media.c
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bootblock-y += pinmux.c
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bootblock-y += reset.c
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@ -28,6 +29,7 @@ bootblock-y += uart.c
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ramstage-y += cbmem.c
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ramstage-y += media.c
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ramstage-y += gpio.c
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ramstage-y += ramstage_entry.S
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ramstage-y += reset.c
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ramstage-y += soc.c
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@ -37,6 +39,7 @@ ramstage-y += uart.c
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romstage-y += cbmem.c
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romstage-y += clock.c
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romstage-y += gpio.c
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romstage-y += media.c
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romstage-y += mmu_operations.c
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romstage-y += reset.c
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71
src/soc/marvell/mvmap2315/gpio.c
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71
src/soc/marvell/mvmap2315/gpio.c
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@ -0,0 +1,71 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2016 Marvell, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <stddef.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include <arch/io.h>
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#include <gpio.h>
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#include <soc/addressmap.h>
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#include <soc/gpio.h>
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#include <soc/pinmux.h>
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struct mvmap2315_gpio_regs *gpio_banks[] = {
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(struct mvmap2315_gpio_regs *)MVMAP2315_GPIOF_BASE,
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(struct mvmap2315_gpio_regs *)MVMAP2315_GPIOG_BASE,
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(struct mvmap2315_gpio_regs *)MVMAP2315_GPIOH_BASE,
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};
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int gpio_get(gpio_t gpio)
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{
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return (read32(&gpio_banks[gpio.bank]->plr) >> gpio.idx) & 0x1;
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}
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void gpio_set(gpio_t gpio, int value)
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{
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if (value)
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setbits_le32(&gpio_banks[gpio.bank]->psr, 1 << gpio.idx);
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else
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setbits_le32(&gpio_banks[gpio.bank]->pcr, 1 << gpio.idx);
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}
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void gpio_input_pulldown(gpio_t gpio)
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{
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set_pinmux(PINMUX(GET_GPIO_PAD(gpio), 0, 1, 0, 0, PULLDOWN));
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clrbits_le32(&gpio_banks[gpio.bank]->pdr, 1 << gpio.idx);
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}
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void gpio_input_pullup(gpio_t gpio)
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{
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set_pinmux(PINMUX(GET_GPIO_PAD(gpio), 0, 1, 0, 0, PULLUP));
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clrbits_le32(&gpio_banks[gpio.bank]->pdr, 1 << gpio.idx);
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}
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void gpio_input(gpio_t gpio)
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{
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set_pinmux(PINMUX(GET_GPIO_PAD(gpio), 0, 1, 0, 0, PULLNONE));
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clrbits_le32(&gpio_banks[gpio.bank]->pdr, 1 << gpio.idx);
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}
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void gpio_output(gpio_t gpio, int value)
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{
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setbits_le32(&gpio_banks[gpio.bank]->pdr, 1 << gpio.idx);
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if (value)
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setbits_le32(&gpio_banks[gpio.bank]->psr, 1 << gpio.idx);
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else
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setbits_le32(&gpio_banks[gpio.bank]->pcr, 1 << gpio.idx);
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}
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@ -24,6 +24,9 @@
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#define MVMAP2315_PINMUX_BASE 0xE0140000
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#define MVMAP2315_TIMER0_BASE 0xE1020000
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#define MVMAP2315_GPIOF_BASE 0xE0142000
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#define MVMAP2315_GPIOG_BASE 0xE0142100
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#define MVMAP2315_GPIOH_BASE 0xE0142200
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#define MVMAP2315_BCM_GICD_BASE 0xE0111000
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#define MVMAP2315_BCM_GICC_BASE 0xE0112000
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99
src/soc/marvell/mvmap2315/include/soc/gpio.h
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99
src/soc/marvell/mvmap2315/include/soc/gpio.h
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@ -0,0 +1,99 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2016 Marvell, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __SOC_MARVELL_MVMAP2315_GPIO_H__
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#define __SOC_MARVELL_MVMAP2315_GPIO_H__
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#include <stdint.h>
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#include <types.h>
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#define GPIO(b, i) ((gpio_t){.bank = GPIO_##b, .idx = i})
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#define GET_GPIO_PAD(gpio) ((gpio.bank * 32) + gpio.idx + 160)
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struct mvmap2315_gpio_regs {
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u32 plr;
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u32 pdr;
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u32 psr;
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u32 pcr;
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u32 hripr;
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u32 lfipr;
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u32 isr;
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u32 sdr;
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u32 cdr;
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u32 shripr;
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u32 chripr;
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u32 slfipr;
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u32 clfipr;
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u32 olr;
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u32 dwer;
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u32 imr;
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u32 rev0;
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u32 rev1;
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u32 simr;
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u32 cimr;
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u32 iter0;
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u32 iter1;
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u32 iter2;
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u32 iter3;
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u32 iter4;
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u32 iter5;
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u32 iter6;
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u32 iter7;
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u32 iter8;
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u32 iter9;
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u32 iter10;
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u32 iter11;
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u32 iter12;
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u32 iter13;
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u32 iter14;
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u32 iter15;
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u32 iter16;
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u32 iter17;
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u32 iter18;
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u32 iter19;
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u32 iter20;
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u32 iter21;
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u32 iter22;
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u32 iter23;
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};
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check_member(mvmap2315_gpio_regs, iter23, 0xac);
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typedef union {
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u32 raw;
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struct {
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u16 port;
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union {
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struct {
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u16 num : 5;
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u16 reserved1 : 11;
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};
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struct {
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u16 idx : 3;
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u16 bank : 2;
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u16 reserved2 : 11;
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};
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};
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};
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} gpio_t;
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enum {
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GPIO_F = 0,
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GPIO_G = 1,
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GPIO_H = 2,
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};
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#endif /* __SOC_MARVELL_MVMAP2315_GPIO_H__ */
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