UPSTREAM: soc/marvell/mvmap2315: Add gpio driver

Testing: booted successfully.

BUG=None
BRANCH=None
TEST=None

Signed-off-by: Hakim Giydan <hgiydan@marvell.com>
Reviewed-on: https://review.coreboot.org/15508
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>

Change-Id: I89dee1bbf8b68460897f64bf673b328533e70cd4
Reviewed-on: https://chromium-review.googlesource.com/384979
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Hakim Giydan 2016-09-08 10:36:06 -07:00 committed by chrome-bot
parent 3615c1b6b2
commit 25155248ce
4 changed files with 176 additions and 0 deletions

View file

@ -19,6 +19,7 @@ bootblock-y += bootblock.c
bootblock-y += clock.c
bootblock-y += fiq.S
bootblock-y += gic.c
bootblock-y += gpio.c
bootblock-y += media.c
bootblock-y += pinmux.c
bootblock-y += reset.c
@ -28,6 +29,7 @@ bootblock-y += uart.c
ramstage-y += cbmem.c
ramstage-y += media.c
ramstage-y += gpio.c
ramstage-y += ramstage_entry.S
ramstage-y += reset.c
ramstage-y += soc.c
@ -37,6 +39,7 @@ ramstage-y += uart.c
romstage-y += cbmem.c
romstage-y += clock.c
romstage-y += gpio.c
romstage-y += media.c
romstage-y += mmu_operations.c
romstage-y += reset.c

View file

@ -0,0 +1,71 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2016 Marvell, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <stddef.h>
#include <stdint.h>
#include <stdlib.h>
#include <arch/io.h>
#include <gpio.h>
#include <soc/addressmap.h>
#include <soc/gpio.h>
#include <soc/pinmux.h>
struct mvmap2315_gpio_regs *gpio_banks[] = {
(struct mvmap2315_gpio_regs *)MVMAP2315_GPIOF_BASE,
(struct mvmap2315_gpio_regs *)MVMAP2315_GPIOG_BASE,
(struct mvmap2315_gpio_regs *)MVMAP2315_GPIOH_BASE,
};
int gpio_get(gpio_t gpio)
{
return (read32(&gpio_banks[gpio.bank]->plr) >> gpio.idx) & 0x1;
}
void gpio_set(gpio_t gpio, int value)
{
if (value)
setbits_le32(&gpio_banks[gpio.bank]->psr, 1 << gpio.idx);
else
setbits_le32(&gpio_banks[gpio.bank]->pcr, 1 << gpio.idx);
}
void gpio_input_pulldown(gpio_t gpio)
{
set_pinmux(PINMUX(GET_GPIO_PAD(gpio), 0, 1, 0, 0, PULLDOWN));
clrbits_le32(&gpio_banks[gpio.bank]->pdr, 1 << gpio.idx);
}
void gpio_input_pullup(gpio_t gpio)
{
set_pinmux(PINMUX(GET_GPIO_PAD(gpio), 0, 1, 0, 0, PULLUP));
clrbits_le32(&gpio_banks[gpio.bank]->pdr, 1 << gpio.idx);
}
void gpio_input(gpio_t gpio)
{
set_pinmux(PINMUX(GET_GPIO_PAD(gpio), 0, 1, 0, 0, PULLNONE));
clrbits_le32(&gpio_banks[gpio.bank]->pdr, 1 << gpio.idx);
}
void gpio_output(gpio_t gpio, int value)
{
setbits_le32(&gpio_banks[gpio.bank]->pdr, 1 << gpio.idx);
if (value)
setbits_le32(&gpio_banks[gpio.bank]->psr, 1 << gpio.idx);
else
setbits_le32(&gpio_banks[gpio.bank]->pcr, 1 << gpio.idx);
}

View file

@ -24,6 +24,9 @@
#define MVMAP2315_PINMUX_BASE 0xE0140000
#define MVMAP2315_TIMER0_BASE 0xE1020000
#define MVMAP2315_GPIOF_BASE 0xE0142000
#define MVMAP2315_GPIOG_BASE 0xE0142100
#define MVMAP2315_GPIOH_BASE 0xE0142200
#define MVMAP2315_BCM_GICD_BASE 0xE0111000
#define MVMAP2315_BCM_GICC_BASE 0xE0112000

View file

@ -0,0 +1,99 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2016 Marvell, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __SOC_MARVELL_MVMAP2315_GPIO_H__
#define __SOC_MARVELL_MVMAP2315_GPIO_H__
#include <stdint.h>
#include <types.h>
#define GPIO(b, i) ((gpio_t){.bank = GPIO_##b, .idx = i})
#define GET_GPIO_PAD(gpio) ((gpio.bank * 32) + gpio.idx + 160)
struct mvmap2315_gpio_regs {
u32 plr;
u32 pdr;
u32 psr;
u32 pcr;
u32 hripr;
u32 lfipr;
u32 isr;
u32 sdr;
u32 cdr;
u32 shripr;
u32 chripr;
u32 slfipr;
u32 clfipr;
u32 olr;
u32 dwer;
u32 imr;
u32 rev0;
u32 rev1;
u32 simr;
u32 cimr;
u32 iter0;
u32 iter1;
u32 iter2;
u32 iter3;
u32 iter4;
u32 iter5;
u32 iter6;
u32 iter7;
u32 iter8;
u32 iter9;
u32 iter10;
u32 iter11;
u32 iter12;
u32 iter13;
u32 iter14;
u32 iter15;
u32 iter16;
u32 iter17;
u32 iter18;
u32 iter19;
u32 iter20;
u32 iter21;
u32 iter22;
u32 iter23;
};
check_member(mvmap2315_gpio_regs, iter23, 0xac);
typedef union {
u32 raw;
struct {
u16 port;
union {
struct {
u16 num : 5;
u16 reserved1 : 11;
};
struct {
u16 idx : 3;
u16 bank : 2;
u16 reserved2 : 11;
};
};
};
} gpio_t;
enum {
GPIO_F = 0,
GPIO_G = 1,
GPIO_H = 2,
};
#endif /* __SOC_MARVELL_MVMAP2315_GPIO_H__ */