mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
fixed write to read address
This commit is contained in:
parent
ac1c251a4d
commit
225c4699d4
1 changed files with 16 additions and 35 deletions
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@ -50,11 +50,7 @@ raminit:
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/* set DRAM type to DDR */
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CS_WRITE($0x60, $0x02)
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#if 0
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CS_WRITE($0x61, $0xaa)
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CS_WRITE($0x62, $0xaf)
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CS_WRITE($0x63, $0xa0)
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#endif
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/* DRAM Arbitration Timer */
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CS_WRITE($0x65, $0x32)
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CS_WRITE($0x66, $0x01)
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@ -76,57 +72,52 @@ raminit:
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/* NOP Command Enable */
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CS_WRITE($0x6b, $0x01)
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/* read a double word from any address of the dimm */
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movl %eax, %ds:(%esi)
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movl %ds:(%esi), %eax
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DELAY(loop200)
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/* All bank Precharge Command Enable */
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CS_WRITE($0x6b, $0x02)
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movl %eax, %ds:(%esi)
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movl %ds:(%esi), %eax
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/* MSR Enable */
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CS_WRITE($0x6b, $0x03)
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/* read 0x2000h */
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movl $0x2000, %ecx
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movl (%ecx), %eax
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// movl $0x4002000, %ecx
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// movl (%ecx), %eax
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movl %ds:(%esi), %eax
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/* read 0x800h */
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movl $0x800, %ecx
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movl (%ecx), %eax
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// movl $0x4000800, %ecx
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// movl (%ecx), %eax
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movl %ds:(%esi), %eax
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/* All banks Precharge Command Enable */
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CS_WRITE($0x6b, $0x02)
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movl %eax, %ds:(%esi)
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movl %ds:(%esi), %eax
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/* CBR Cycle Enable */
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CS_WRITE($0x6b, $0x04)
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/* Read 8 times */
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movl %eax, %ds:(%esi)
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movl %ds:(%esi), %eax
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DELAY(loop100)
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movl %eax, %ds:(%esi)
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movl %ds:(%esi), %eax
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DELAY(loop100)
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movl %eax, %ds:(%esi)
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movl %ds:(%esi), %eax
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DELAY(loop100)
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movl %eax, %ds:(%esi)
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movl %ds:(%esi), %eax
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DELAY(loop100)
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movl %eax, %ds:(%esi)
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movl %ds:(%esi), %eax
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DELAY(loop100)
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movl %eax, %ds:(%esi)
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movl %ds:(%esi), %eax
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DELAY(loop100)
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movl %eax, %ds:(%esi)
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movl %ds:(%esi), %eax
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DELAY(loop100)
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movl %eax, %ds:(%esi)
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movl %ds:(%esi), %eax
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DELAY(loop100)
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/* MSR Enable */
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CS_WRITE($0x6b, $0x03)
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/* 0x150 if CAS Latency 2 or 0x350 CAS Latency 2.5 */
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movl $0x350, %ecx
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movl (%ecx), %eax
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// movl $0x4000350, %ecx
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// movl (%ecx), %eax
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movl %ds:(%esi), %eax
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/* Normal SDRAM Mode */
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CS_WRITE($0x6b, $0x58)
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@ -143,16 +134,6 @@ raminit:
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CS_WRITE($0x71, $0xc8)
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#if 0
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CS_WRITE($0x80, $0x0f)
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CS_WRITE($0x84, $0x80)
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CS_WRITE($0x88, $0x02)
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CS_WRITE($0xb8, $0x8a)
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CS_WRITE($0xe0, $0x81)
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CS_WRITE($0xe1, $0xdd)
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CS_WRITE($0xe2, $0x42)
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#endif
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/* graphics aperture base */
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CS_WRITE($0x13, $0xd0)
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