UPSTREAM: mb/google/poppy: Add eMMC as thermal sensor

This patch adds the eMMC as one of the thermal sensor under DPTF.
Also, updates few comments for better interpretation and mapping.

BUG=None
BRANCH=None
TEST=Built for poppy.

Change-Id: I22edad5afd0e24fd19ee7857b750f0168d13a818
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: c9026b2945
Original-Change-Id: I6d05bb7a2f857dc5bc98227c8327b2ff1bd5b913
Original-Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Original-Reviewed-on: https://review.coreboot.org/19524
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/498308
This commit is contained in:
Sumeet Pawnikar 2017-05-02 16:39:46 +05:30 committed by chrome-bot
parent b0f46c782f
commit 217da28754

View file

@ -32,6 +32,11 @@
#define DPTF_TSR2_PASSIVE 52 #define DPTF_TSR2_PASSIVE 52
#define DPTF_TSR2_CRITICAL 75 #define DPTF_TSR2_CRITICAL 75
#define DPTF_TSR3_SENSOR_ID 4
#define DPTF_TSR3_SENSOR_NAME "eMMC"
#define DPTF_TSR3_PASSIVE 55
#define DPTF_TSR3_CRITICAL 75
#define DPTF_ENABLE_CHARGER #define DPTF_ENABLE_CHARGER
/* Charger performance states, board-specific values from charger and EC */ /* Charger performance states, board-specific values from charger and EC */
@ -46,16 +51,19 @@ Name (DTRT, Package () {
/* CPU Throttle Effect on CPU */ /* CPU Throttle Effect on CPU */
Package () { \_SB.PCI0.B0D4, \_SB.PCI0.B0D4, 100, 50, 0, 0, 0, 0 }, Package () { \_SB.PCI0.B0D4, \_SB.PCI0.B0D4, 100, 50, 0, 0, 0, 0 },
/* CPU Effect on Temp Sensor 0 */ /* CPU Throttle Effect on Ambient (TSR0) */
Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR0, 100, 600, 0, 0, 0, 0 }, Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR0, 100, 600, 0, 0, 0, 0 },
#ifdef DPTF_ENABLE_CHARGER #ifdef DPTF_ENABLE_CHARGER
/* Charger Effect on Temp Sensor 1 */ /* Charger Throttle Effect on Charger (TSR1) */
Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR1, 200, 600, 0, 0, 0, 0 }, Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR1, 100, 600, 0, 0, 0, 0 },
#endif #endif
/* CPU Effect on Temp Sensor 2 */ /* CPU Throttle Effect on DRAM (TSR2) */
Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR2, 100, 90, 0, 0, 0, 0 }, Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR2, 100, 90, 0, 0, 0, 0 },
/* CPU Throttle Effect on eMMC (TSR3) */
Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR3, 100, 600, 0, 0, 0, 0 },
}) })
Name (MPPC, Package () Name (MPPC, Package ()