diff --git a/arch/x86/Makefile b/arch/x86/Makefile index 92fdebb9b6..acb798ed73 100644 --- a/arch/x86/Makefile +++ b/arch/x86/Makefile @@ -3,6 +3,7 @@ ## ## Copyright (C) 2006-2007 coresystems GmbH ## (Written by Stefan Reinauer for coresystems GmbH) +## Copyright (C) 2007-2008 Carl-Daniel Hailfinger ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by @@ -98,15 +99,15 @@ $(obj)/coreboot.bootblock: $(obj)/coreboot.vpd $(obj)/stage0.init # -STAGE0_LIB_OBJ = uart8250.o mem.o lar.o delay.o vtxprintf.o \ - vsprintf.o console.o string.o $(DECOMPRESSORS) -STAGE0_ARCH_X86_OBJ = stage1.o serial.o speaker.o \ - udelay_io.o mc146818rtc.o post_code.o \ - pci_ops_conf1.o resourcemap.o +STAGE0_LIB_SRC = uart8250.c mem.c lar.c delay.c vtxprintf.c \ + vsprintf.c console.c string.c $(DECOMPRESSORS) +STAGE0_ARCH_X86_SRC = stage1.c serial.c speaker.c \ + udelay_io.c mc146818rtc.c post_code.c \ + pci_ops_conf1.c resourcemap.c ifeq ($(CONFIG_PAYLOAD_ELF_LOADER),y) -STAGE0_LIB_OBJ += elfboot.o -STAGE0_ARCH_X86_OBJ += archelfboot.o +STAGE0_LIB_SRC += elfboot.c +STAGE0_ARCH_X86_SRC += archelfboot.c endif ifeq ($(CONFIG_CPU_I586),y) @@ -114,12 +115,12 @@ ifeq ($(CONFIG_CPU_I586),y) else ifeq ($(CONFIG_CPU_AMD_GEODELX),y) STAGE0_CAR_OBJ = geodelx/stage0.o - STAGE0_ARCH_X86_OBJ += geodelx/stage1.o - STAGE0_ARCH_X86_OBJ += ../../northbridge/amd/geodelx/geodelxinit.o + STAGE0_ARCH_X86_SRC += geodelx/stage1.c + STAGE0_ARCH_X86_SRC += ../../northbridge/amd/geodelx/geodelxinit.c else ifeq ($(CONFIG_CPU_AMD_K8),y) STAGE0_CAR_OBJ = amd/stage0.o - STAGE0_ARCH_X86_OBJ += amd/k8/stage1.o + STAGE0_ARCH_X86_SRC += amd/k8/stage1.c endif endif endif @@ -130,10 +131,12 @@ else PARSEELF = -e endif -STAGE0_OBJ := $(patsubst %,$(obj)/lib/%,$(STAGE0_LIB_OBJ)) \ - $(patsubst %,$(obj)/arch/x86/%,$(STAGE0_ARCH_X86_OBJ)) \ - $(patsubst %,$(obj)/arch/x86/%,$(STAGE0_CAR_OBJ)) \ - $(STAGE0_MAINBOARD_OBJ) $(STAGE0_CHIPSET_OBJ) +STAGE0_SRC := $(patsubst %,$(src)/lib/%,$(STAGE0_LIB_SRC)) \ + $(patsubst %,$(src)/arch/x86/%,$(STAGE0_ARCH_X86_SRC)) \ + $(STAGE0_MAINBOARD_SRC) $(STAGE0_CHIPSET_SRC) + +STAGE0_OBJ := $(patsubst $(src)/%.c,$(obj)/%.o,$(STAGE0_SRC)) \ + $(patsubst %,$(obj)/arch/x86/%,$(STAGE0_CAR_OBJ)) $(obj)/stage0.o $(obj)/stage0.init $(obj)/stage0-prefixed.o: $(STAGE0_OBJ) $(Q)# We need to be careful. If stage0.o gets bigger than @@ -182,7 +185,7 @@ ifeq ($(CONFIG_PIRQ_TABLE),y) STAGE2_ARCH_X86_SRC += pirq_routing.c endif -STAGE2_DYNAMIC_OBJ = statictree.o +STAGE2_DYNAMIC_SRC = $(obj)/mainboard/$(MAINBOARDDIR)/statictree.c STAGE2_SRC := $(patsubst %,$(src)/lib/%,$(STAGE2_LIB_SRC)) \ $(patsubst %,$(src)/arch/x86/%,$(STAGE2_ARCH_X86_SRC)) \ @@ -195,7 +198,7 @@ STAGE2_OBJ := $(patsubst $(src)/%.c,$(obj)/%.o,$(STAGE2_SRC)) # This one is special because the static tree object ends up in the mainboard # dir of the object tree. -STAGE2_OBJ += $(patsubst %,$(obj)/mainboard/$(MAINBOARDDIR)/%,$(STAGE2_DYNAMIC_OBJ)) +STAGE2_OBJ += $(patsubst $(obj)/%.c,$(obj)/%.o,$(STAGE2_DYNAMIC_SRC)) ifeq ($(CONFIG_PCI_OPTION_ROM_RUN),y) ifeq ($(CONFIG_PCI_OPTION_ROM_RUN_X86EMU),y) diff --git a/lib/Makefile b/lib/Makefile index b4b83863b8..afbff92ad8 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -21,10 +21,10 @@ DECOMPRESSORS := ifeq ($(CONFIG_COMPRESSION_LZMA),y) -DECOMPRESSORS += lzma.o +DECOMPRESSORS += lzma.c endif ifeq ($(CONFIG_COMPRESSION_NRV2B),y) -DECOMPRESSORS += nrv2b.o +DECOMPRESSORS += nrv2b.c endif # diff --git a/mainboard/adl/msm800sev/Makefile b/mainboard/adl/msm800sev/Makefile index aa1d15ae56..269baf3748 100644 --- a/mainboard/adl/msm800sev/Makefile +++ b/mainboard/adl/msm800sev/Makefile @@ -19,7 +19,7 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -STAGE0_MAINBOARD_OBJ := $(obj)/mainboard/$(MAINBOARDDIR)/stage1.o +STAGE0_MAINBOARD_SRC := $(src)/mainboard/$(MAINBOARDDIR)/stage1.c INITRAM_SRC = $(src)/mainboard/$(MAINBOARDDIR)/initram.c \ $(src)/northbridge/amd/geodelx/raminit.c \ diff --git a/mainboard/amd/db800/Makefile b/mainboard/amd/db800/Makefile index c4c00dd86e..a8bd1db04f 100644 --- a/mainboard/amd/db800/Makefile +++ b/mainboard/amd/db800/Makefile @@ -19,7 +19,7 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -STAGE0_MAINBOARD_OBJ := $(obj)/mainboard/$(MAINBOARDDIR)/stage1.o +STAGE0_MAINBOARD_SRC := $(src)/mainboard/$(MAINBOARDDIR)/stage1.c INITRAM_SRC = $(src)/mainboard/$(MAINBOARDDIR)/initram.c \ $(src)/northbridge/amd/geodelx/raminit.c \ diff --git a/mainboard/amd/norwich/Makefile b/mainboard/amd/norwich/Makefile index c4c00dd86e..a8bd1db04f 100644 --- a/mainboard/amd/norwich/Makefile +++ b/mainboard/amd/norwich/Makefile @@ -19,7 +19,7 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -STAGE0_MAINBOARD_OBJ := $(obj)/mainboard/$(MAINBOARDDIR)/stage1.o +STAGE0_MAINBOARD_SRC := $(src)/mainboard/$(MAINBOARDDIR)/stage1.c INITRAM_SRC = $(src)/mainboard/$(MAINBOARDDIR)/initram.c \ $(src)/northbridge/amd/geodelx/raminit.c \ diff --git a/mainboard/amd/serengeti/Makefile b/mainboard/amd/serengeti/Makefile index dd65dce8ae..de7e6e1baa 100644 --- a/mainboard/amd/serengeti/Makefile +++ b/mainboard/amd/serengeti/Makefile @@ -19,14 +19,14 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -STAGE0_MAINBOARD_OBJ := $(obj)/mainboard/$(MAINBOARDDIR)/stage1.o \ - $(obj)/mainboard/$(MAINBOARDDIR)/option_table.o \ - $(obj)/southbridge/amd/amd8111/stage1_smbus.o \ - $(obj)/southbridge/amd/amd8111/stage1_ctrl.o \ - $(obj)/northbridge/amd/k8/coherent_ht.o \ - $(obj)/northbridge/amd/k8/incoherent_ht.o \ - $(obj)/northbridge/amd/k8/libstage1.o \ - $(obj)/lib/clog2.o +STAGE0_MAINBOARD_SRC := $(src)/mainboard/$(MAINBOARDDIR)/stage1.c \ + $(src)/mainboard/$(MAINBOARDDIR)/option_table.c \ + $(src)/southbridge/amd/amd8111/stage1_smbus.c \ + $(src)/southbridge/amd/amd8111/stage1_ctrl.c \ + $(src)/northbridge/amd/k8/coherent_ht.c \ + $(src)/northbridge/amd/k8/incoherent_ht.c \ + $(src)/northbridge/amd/k8/libstage1.c \ + $(src)/lib/clog2.c INITRAM_SRC= $(src)/mainboard/$(MAINBOARDDIR)/initram.c \ $(src)/northbridge/amd/k8/raminit.c \ diff --git a/mainboard/artecgroup/dbe61/Makefile b/mainboard/artecgroup/dbe61/Makefile index c0ac8352bc..9febdf41ad 100644 --- a/mainboard/artecgroup/dbe61/Makefile +++ b/mainboard/artecgroup/dbe61/Makefile @@ -19,7 +19,7 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -STAGE0_MAINBOARD_OBJ := $(obj)/mainboard/$(MAINBOARDDIR)/stage1.o +STAGE0_MAINBOARD_SRC := $(src)/mainboard/$(MAINBOARDDIR)/stage1.c INITRAM_SRC = $(src)/mainboard/$(MAINBOARDDIR)/initram.c \ $(src)/northbridge/amd/geodelx/raminit.c \ diff --git a/mainboard/artecgroup/dbe62/Makefile b/mainboard/artecgroup/dbe62/Makefile index ffea3c807c..81a217fca3 100644 --- a/mainboard/artecgroup/dbe62/Makefile +++ b/mainboard/artecgroup/dbe62/Makefile @@ -19,7 +19,7 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -STAGE0_MAINBOARD_OBJ := $(obj)/mainboard/$(MAINBOARDDIR)/stage1.o +STAGE0_MAINBOARD_SRC := $(src)/mainboard/$(MAINBOARDDIR)/stage1.c INITRAM_SRC = $(src)/mainboard/$(MAINBOARDDIR)/initram.c \ $(src)/northbridge/amd/geodelx/raminit.c \ diff --git a/mainboard/emulation/qemu-x86/Makefile b/mainboard/emulation/qemu-x86/Makefile index c096c81440..8f995cd389 100644 --- a/mainboard/emulation/qemu-x86/Makefile +++ b/mainboard/emulation/qemu-x86/Makefile @@ -19,7 +19,7 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -STAGE0_MAINBOARD_OBJ := $(obj)/mainboard/$(MAINBOARDDIR)/stage1.o +STAGE0_MAINBOARD_SRC := $(src)/mainboard/$(MAINBOARDDIR)/stage1.c # # This is going to be the init RAM code. diff --git a/mainboard/gigabyte/m57sli/Makefile b/mainboard/gigabyte/m57sli/Makefile index afe8120be4..f3331fb77b 100644 --- a/mainboard/gigabyte/m57sli/Makefile +++ b/mainboard/gigabyte/m57sli/Makefile @@ -19,12 +19,12 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -STAGE0_MAINBOARD_OBJ := $(obj)/mainboard/$(MAINBOARDDIR)/stage1.o \ - $(obj)/mainboard/$(MAINBOARDDIR)/option_table.o \ - $(obj)/southbridge/nvidia/mcp55/stage1_smbus.o \ - $(obj)/northbridge/amd/k8/coherent_ht.o \ - $(obj)/northbridge/amd/k8/incoherent_ht.o \ - $(obj)/lib/clog2.o +STAGE0_MAINBOARD_SRC := $(src)/mainboard/$(MAINBOARDDIR)/stage1.c \ + $(src)/mainboard/$(MAINBOARDDIR)/option_table.c \ + $(src)/southbridge/nvidia/mcp55/stage1_smbus.c \ + $(src)/northbridge/amd/k8/coherent_ht.c \ + $(src)/northbridge/amd/k8/incoherent_ht.c \ + $(src)/lib/clog2.c INITRAM_SRC= $(src)/mainboard/$(MAINBOARDDIR)/initram.c \ $(src)/northbridge/amd/k8/raminit.c \ diff --git a/mainboard/pcengines/alix1c/Makefile b/mainboard/pcengines/alix1c/Makefile index c0ac8352bc..9febdf41ad 100644 --- a/mainboard/pcengines/alix1c/Makefile +++ b/mainboard/pcengines/alix1c/Makefile @@ -19,7 +19,7 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -STAGE0_MAINBOARD_OBJ := $(obj)/mainboard/$(MAINBOARDDIR)/stage1.o +STAGE0_MAINBOARD_SRC := $(src)/mainboard/$(MAINBOARDDIR)/stage1.c INITRAM_SRC = $(src)/mainboard/$(MAINBOARDDIR)/initram.c \ $(src)/northbridge/amd/geodelx/raminit.c \ diff --git a/mainboard/pcengines/alix2c3/Makefile b/mainboard/pcengines/alix2c3/Makefile index c0ac8352bc..9febdf41ad 100644 --- a/mainboard/pcengines/alix2c3/Makefile +++ b/mainboard/pcengines/alix2c3/Makefile @@ -19,7 +19,7 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -STAGE0_MAINBOARD_OBJ := $(obj)/mainboard/$(MAINBOARDDIR)/stage1.o +STAGE0_MAINBOARD_SRC := $(src)/mainboard/$(MAINBOARDDIR)/stage1.c INITRAM_SRC = $(src)/mainboard/$(MAINBOARDDIR)/initram.c \ $(src)/northbridge/amd/geodelx/raminit.c \ diff --git a/southbridge/amd/amd8111/Makefile b/southbridge/amd/amd8111/Makefile index 35299d008f..92ae2aae51 100644 --- a/southbridge/amd/amd8111/Makefile +++ b/southbridge/amd/amd8111/Makefile @@ -34,7 +34,7 @@ STAGE2_CHIPSET_SRC += \ $(src)/southbridge/amd/amd8111/usb.c \ $(src)/southbridge/amd/amd8111/usb2.c -STAGE0_CHIPSET_OBJ += $(obj)/southbridge/amd/amd8111/stage1.o +STAGE0_CHIPSET_SRC += $(src)/southbridge/amd/amd8111/stage1.c endif diff --git a/southbridge/amd/cs5536/Makefile b/southbridge/amd/cs5536/Makefile index 1cfc9f4e61..ed21896dd9 100644 --- a/southbridge/amd/cs5536/Makefile +++ b/southbridge/amd/cs5536/Makefile @@ -27,6 +27,6 @@ ifeq ($(CONFIG_PIRQ_TABLE),y) STAGE2_CHIPSET_SRC += $(src)/southbridge/amd/cs5536/irq_tables.c endif -STAGE0_CHIPSET_OBJ += $(obj)/southbridge/amd/cs5536/stage1.o +STAGE0_CHIPSET_SRC += $(src)/southbridge/amd/cs5536/stage1.c endif diff --git a/southbridge/nvidia/mcp55/Makefile b/southbridge/nvidia/mcp55/Makefile index 3ef8dc2036..837eb6e648 100644 --- a/southbridge/nvidia/mcp55/Makefile +++ b/southbridge/nvidia/mcp55/Makefile @@ -36,7 +36,7 @@ STAGE2_CHIPSET_SRC += $(src)/southbridge/nvidia/mcp55/ide.c \ $(src)/southbridge/nvidia/mcp55/usb.c \ $(src)/southbridge/nvidia/mcp55/usb2.c -STAGE0_CHIPSET_OBJ += $(obj)/southbridge/nvidia/mcp55/stage1.o +STAGE0_CHIPSET_SRC += $(src)/southbridge/nvidia/mcp55/stage1.c endif diff --git a/superio/fintek/f71805f/Makefile b/superio/fintek/f71805f/Makefile index 078b6e0c93..e37e696d71 100644 --- a/superio/fintek/f71805f/Makefile +++ b/superio/fintek/f71805f/Makefile @@ -20,8 +20,8 @@ ifeq ($(CONFIG_SUPERIO_FINTEK_F71805F),y) -STAGE0_CHIPSET_OBJ += $(obj)/superio/fintek/f71805f/stage1.o -STAGE0_CHIPSET_OBJ += $(obj)/device/pnp_raw.o +STAGE0_CHIPSET_SRC += $(src)/superio/fintek/f71805f/stage1.c +STAGE0_CHIPSET_SRC += $(src)/device/pnp_raw.c # Always add to variables, as there could be more than one Super I/O. STAGE2_CHIPSET_SRC += $(src)/superio/fintek/f71805f/superio.c diff --git a/superio/ite/it8716f/Makefile b/superio/ite/it8716f/Makefile index b1c60ee9fc..801d35b3dd 100644 --- a/superio/ite/it8716f/Makefile +++ b/superio/ite/it8716f/Makefile @@ -20,8 +20,8 @@ ifeq ($(CONFIG_SUPERIO_ITE_IT8716F),y) -STAGE0_CHIPSET_OBJ += $(obj)/superio/ite/it8716f/stage1.o -STAGE0_CHIPSET_OBJ += $(obj)/device/pnp_raw.o +STAGE0_CHIPSET_SRC += $(src)/superio/ite/it8716f/stage1.c +STAGE0_CHIPSET_SRC += $(src)/device/pnp_raw.c # Always add to variables, as there could be more than one Super I/O. STAGE2_CHIPSET_SRC += $(src)/superio/ite/it8716f/superio.c diff --git a/superio/winbond/w83627hf/Makefile b/superio/winbond/w83627hf/Makefile index 0b64378d0f..cedf89c1c3 100644 --- a/superio/winbond/w83627hf/Makefile +++ b/superio/winbond/w83627hf/Makefile @@ -21,8 +21,8 @@ ifeq ($(CONFIG_SUPERIO_WINBOND_W83627HF),y) -STAGE0_CHIPSET_OBJ += $(obj)/superio/winbond/w83627hf/stage1.o -STAGE0_CHIPSET_OBJ += $(obj)/device/pnp_raw.o +STAGE0_CHIPSET_SRC += $(src)/superio/winbond/w83627hf/stage1.c +STAGE0_CHIPSET_SRC += $(src)/device/pnp_raw.c # Always add to variables, as there could be more than one Super I/O. STAGE2_CHIPSET_SRC += $(src)/superio/winbond/w83627hf/superio.c