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UPSTREAM: mainboard/google/poppy: Change SD card detect to GPP_E15

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SD card detect pin is moved to GPP_E15 in the next build. Update
device tree and gpio config accordingly.

BUG=b:36012095

Change-Id: I66a79e4a26a3a0263a86a9bd19626f339846ee0a
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 66386d2497
Original-Change-Id: Ic0ff72cdcb0f1ca27abc7eb8da9ccd8a21b28522
Original-Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/19107
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Naresh Solanki <naresh.solanki@intel.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Pratikkumar Prajapati <pratikkumar.v.prajapati@intel.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/471452
This commit is contained in:
Furquan Shaikh 2017-04-03 21:52:39 -07:00 • committed by chrome-bot
parent 859f061939
commit 194c3a7785
2 changed files with 3 additions and 3 deletions
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2
src/mainboard/google/poppy/devicetree.cb
View file

@ -177,7 +177,7 @@ chip soc/intel/skylake
register "tcc_offset" = "10" # TCC of 90C
# Use default SD card detect GPIO configuration
register "sdcard_cd_gpio_default" = "GPP_A7"
register "sdcard_cd_gpio_default" = "GPP_E15"
device cpu_cluster 0 on
device lapic 0 on end

4
src/mainboard/google/poppy/gpio.h
View file

@ -48,7 +48,7 @@ static const struct pad_config gpio_table[] = {
/* ESPI_IO3 */
/* ESPI_CS# */
/* SERIRQ */ PAD_CFG_NC(GPP_A6), /* TP44 */
/* PIRQA# */ PAD_CFG_GPI(GPP_A7, 20K_PU, DEEP), /* SD_CD# */
/* PIRQA# */ PAD_CFG_NC(GPP_A7),
/* CLKRUN# */ PAD_CFG_NC(GPP_A8), /* TP45 */
/* ESPI_CLK */
/* CLKOUT_LPC1 */ PAD_CFG_NC(GPP_A10),
@ -166,7 +166,7 @@ static const struct pad_config gpio_table[] = {
NF1), /* USB_C0_DP_HPD */
/* DDPC_HPD1 */ PAD_CFG_NF(GPP_E14, NONE, DEEP,
NF1), /* USB_C1_DP_HPD */
/* DDPD_HPD2 */ PAD_CFG_NC(GPP_E15), /* TP48 */
/* DDPD_HPD2 */ PAD_CFG_GPI(GPP_E15, 20K_PU, DEEP), /* SD_CD# */
/* DDPE_HPD3 */ PAD_CFG_NC(GPP_E16), /* TP244 */
/* EDP_HPD */ PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1),
/* DDPB_CTRLCLK */ PAD_CFG_NC(GPP_E18),