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document on newboot

Browse source 
Signed-off-by: Ronald G. Minnich <rminnich@lanl.gov>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@40 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Ronald G. Minnich 2006-11-08 23:06:01 +00:00
parent 92efb61fa7
commit 18e746e132
5 changed files with 1130 additions and 0 deletions
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57
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/{
model = "qemu";
#address-cells = <1>;
#size-cells = <1>;
compatible = "emulation-i386,qemu";
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu,emulation,qemu-i386@0{
device_type = "cpu";
clock-frequency = <5f5e1000>;
timebase-frequency = <1FCA055>;
linux,boot-cpu;
reg = <0>;
i-cache-size = <2000>;
d-cache-size = <2000>;
links=<&northbridge,intel,440bx &/northbridge,intel,440bx>;
};
};
spd = <
(0xa<<3)|0, (0xa<<3)|2, 0, 0,
(0xa<<3)|1, (0xa<<3)|3, 0, 0,
(0xa<<3)|4, (0xa<<3)|6, 0, 0,
(0xa<<3)|5, (0xa<<3)|7, 0, 0,
>;
memory@0 {
device_type = "memory";
reg = <00000000 20000000>;
};
/* the I/O stuff */
northbridge,intel,440bx{
southbridge,intel,piix4{
superio,nsc,sucks{
uart@0{
enabled=<1>;
};
};
};
};
chosen {
bootargs = "root=/dev/sda2";
linux,platform = <00000600>;
linux,stdout-path="/dev/ttyS0";
};
options {
normal="normal";
fallback="fallback";
};
};

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documentation/design/flashlayout.fig Normal file
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#FIG 3.2
Landscape
Center
Inches
Letter
100.00
Single
-2
1200 2
2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
2400 6225 6900 6225
2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
2400 6975 6900 6975
2 2 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
4650 6975 6900 6975 6900 6675 4650 6675 4650 6975
2 2 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
4650 6225 6900 6225 6900 5775 4650 5775 4650 6225
2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
2400 4050 6900 4050
2 2 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
2400 450 6900 450 6900 7350 2400 7350 2400 450
2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
2400 4800 6900 4800
4 0 0 50 -1 0 12 0.0000 4 135 750 2550 7275 JMP start\001
4 0 0 50 -1 0 12 0.0000 4 135 375 4350 6450 VPD\001
4 0 0 50 -1 0 12 0.0000 4 180 1935 4800 6900 VPD checksum (4 bytes)\001
4 0 0 50 -1 0 12 0.0000 4 180 1980 4800 6075 Code Checksum (4 bytes)\001
4 0 0 50 -1 0 12 0.0000 4 135 690 1500 7350 0xfffffff0\001
4 0 0 50 -1 0 12 0.0000 4 135 720 1500 6375 0xffffff00\001
4 0 0 50 -1 0 12 0.0000 4 135 960 3375 675 LAR archive\001
4 0 0 50 -1 0 12 0.0000 4 135 360 3375 900 lzma\001
4 0 0 50 -1 0 12 0.0000 4 135 420 3375 1125 nrv2b\001
4 0 0 50 -1 0 12 0.0000 4 135 1080 3375 1350 normal/initram\001
4 0 0 50 -1 0 12 0.0000 4 135 1635 3375 1575 normal/linuxbios.lzma\001
4 0 0 50 -1 0 12 0.0000 4 135 1170 3375 1800 fallback/initram\001
4 0 0 50 -1 0 12 0.0000 4 135 1725 3375 2025 fallback/linuxbios.lzma\001
4 0 0 50 -1 0 12 0.0000 4 135 2130 3375 2250 memtest86/memtest86.lzma\001
4 0 0 50 -1 0 12 0.0000 4 180 990 3375 2475 vgabios.lzma\001
4 0 0 50 -1 0 12 0.0000 4 180 1020 2625 4275 Basic startup\001
4 0 0 50 -1 0 12 0.0000 4 180 1365 4425 4425 src/cpu/x86/crt0.S\001
4 0 0 50 -1 0 12 0.0000 4 135 1320 3150 5025 Device Tree Blob\001
4 0 0 50 -1 0 12 0.0000 4 135 1365 3150 5250 Device Tree Code\001
4 0 0 50 -1 0 12 0.0000 4 180 1440 3150 5475 CPIO code support\001
4 0 0 50 -1 0 12 0.0000 4 180 2610 3150 5700 FLASH recovery from serial ROM\001
4 0 0 50 -1 0 12 0.0000 4 135 375 2925 4500 CAR\001
4 0 0 50 -1 0 12 0.0000 4 180 1845 2925 4650 Pre-initram device setup\001

732
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#LyX 1.4.2 created this file. For more info see http://www.lyx.org/
\lyxformat 245
\begin_document
\begin_header
\textclass latex8
\language english
\inputencoding default
\fontscheme default
\graphics default
\paperfontsize 10
\spacing single
\papersize default
\use_geometry false
\use_amsmath 0
\cite_engine basic
\use_bibtopic false
\paperorientation portrait
\secnumdepth 2
\tocdepth 2
\paragraph_separation indent
\defskip medskip
\quotes_language english
\papercolumns 1
\papersides 1
\paperpagestyle empty
\tracking_changes false
\output_changes true
\end_header
\begin_body
\begin_layout Title
LinuxBIOS boot structure
\newline
LA-UR-06-7928
\end_layout
\begin_layout Author
New LinuxBIOS group
\newline
\end_layout
\begin_layout Standard
\begin_inset ERT
status collapsed
\begin_layout Standard
\backslash
thispagestyle{empty}
\end_layout
\end_inset
\end_layout
\begin_layout Abstract
This is the new linuxbios boot architectures
\end_layout
\begin_layout Section
Introduction
\begin_inset Note Note
status collapsed
\begin_layout Standard
rae Sat Jun 20 18:39:35 1998
\end_layout
\begin_layout Standard
Section number will appear correctly on paper.
\end_layout
\begin_layout Standard
That is, "1." instead of just "1"
\end_layout
\end_inset
\end_layout
\begin_layout Standard
The new LinuxBIOS boot architecture depends on CAR, with payloads appearing
as files in a cpio archive.
The device tree is defined by a device tree blob (DTB) and all the activities
flow from that.
For now, the DTC will produce a standard V2 device tree; this will, we
hope, be improved.
romcc is gone.
\end_layout
\begin_layout Standard
Required attributes of a CPU for V3:
\end_layout
\begin_layout Itemize
Supports CAR
\end_layout
\begin_layout Standard
Required platform attributes:
\end_layout
\begin_layout Section
Goal
\end_layout
\begin_layout Subsection
Design Goals
\end_layout
\begin_layout Itemize
remove linuxbios tree -- people found it too confusing.
\end_layout
\begin_layout Itemize
Make the device tree format from open firmware the focus of the linuxbios
code
\end_layout
\begin_layout Subsection
Features
\end_layout
\begin_layout Section
FLASH layout
\end_layout
\begin_layout Standard
Shown in
\begin_inset LatexCommand \ref{fig:FLASH-layout}
\end_inset
is the layout of the whole FLASH.
Note that we can kill buildrom tool, since the FLASH code is now a CPIO
archive.
Note that the linker script will now be very simple.
The initram is roughly what is in auto.c, although the early hardware setup
from auto.c is now in the pre-initram, so that we have serial output and
other capabilities.
The FLASH recovery is interesting: in hopeless cases, the serial port can
be used to load a new flash image, and allow a successful boot from a totally
hosed machine.
VPD includes data such as the MAC address, instance of the motherboard,
etc.
The DTB can be modified by the flashrom tool, and hence a platform can
be customized from a binary FLASH image.
Each CPIO file has a checksum attached to the end, so that the system can
verify that the data is uncorrupted.
We now build at least four targets for a platform:
\end_layout
\begin_layout Itemize
basic startup and CAR (in most cases, same for all processors of a given
type)
\end_layout
\begin_layout Itemize
Pre-initram device setup (large FLASH, serial port, etc.)
\end_layout
\begin_layout Itemize
initram
\end_layout
\begin_layout Itemize
Traditional linuxbios ram code (LAR, etc.)
\end_layout
\begin_layout Itemize
Load payload and start it
\end_layout
\begin_layout Standard
\begin_inset Float figure
wide false
sideways false
status open
\begin_layout Caption
\begin_inset LatexCommand \label{fig:FLASH-layout}
\end_inset
FLASH layout
\end_layout
\begin_layout Standard
\begin_inset Graphics
filename flashlayout.eps
\end_inset
\end_layout
\end_inset
\end_layout
\begin_layout Section
Boot Process
\end_layout
\begin_layout Subsection
Stage 0: Basic startup (ASM, PIC)
\end_layout
\begin_layout Subsection
Stage 1: CAR (ASM, PIC)
\end_layout
\begin_layout Standard
This is a standard cache-as-ram .s file for the architecture.
\end_layout
\begin_layout Subsection
Stage 2:
\end_layout
\begin_layout Enumerate
Bzero an (e.g.) 4K block of cache (it is 4K now).
(ASM, PIC)
\end_layout
\begin_layout Enumerate
Set up a stack variable so that we have stack and auto in that cache (ASM,
PIC)
\end_layout
\begin_layout Enumerate
preboot hardware, as from auto.c (C)
\end_layout
\begin_layout Enumerate
Decide whether we can proceed or must recover from serial port.
(C)
\end_layout
\begin_layout Enumerate
checksum the top flash
\begin_inset Quotes eld
\end_inset
boot area
\begin_inset Quotes erd
\end_inset
, if it is bad then ...
reover from serial port (C, PIC).
We can definitely reflash CPIO archive, but NOTE: reflashing the boot block
is tricky ...
(C)
\end_layout
\begin_layout Subsection
Stage 3
\end_layout
\begin_layout Enumerate
Examine the flash.
Look in DTB option node, normal property for directory named by the boot
type (e.g.
'normal',
\begin_inset Quotes eld
\end_inset
fallback', etc.) (C)
\end_layout
\begin_layout Enumerate
In that directory, need 'initram', 'payload.ext', and others.
make sure that in '/', ther eis a decompressor of the irght type for each
extension needed.
(C)
\end_layout
\begin_layout Subsection
Stage 4
\end_layout
\begin_layout Enumerate
Each file has a four-byte checksum at end.
Check the checksum for each one.
(C)
\end_layout
\begin_layout Enumerate
If all the tests pass, run each one, in order, decompressing those which
need it.
The last one might not return.
If the checksum fails, If the test fails, use the backup property in the
option node to find a backup.
initram is (C, PIC) as it must execute in place.
The linuxbios payload will be uncompressed to RAM, and is in C, but need
not be PIC.
\end_layout
\begin_layout Subsection
Stage 5
\end_layout
\begin_layout Section
The static tree
\end_layout
\begin_layout Standard
The static tree is generated from the DTS.
Shown is a sample DTS, for qemu.
Note that we don't fill out all properties of each node, e.g.
the northbridge.
The sum total of all properties is found in the dts for that node in the
source directiory, i.e.
src/northbridge/intel/440bx/440bx.dts (is this name ok? Or just chip.dts?)
\end_layout
\begin_layout Quote
\begin_inset Float figure
wide false
sideways false
status open
\begin_layout Caption
Sample DTS
\end_layout
\begin_layout LyX-Code
/{
\end_layout
\begin_layout LyX-Code
model = "qemu";
\end_layout
\begin_layout LyX-Code
#address-cells = <1>;
\end_layout
\begin_layout LyX-Code
#size-cells = <1>;
\end_layout
\begin_layout LyX-Code
compatible = "emulation-i386,qemu";
\end_layout
\begin_layout LyX-Code
cpus {
\end_layout
\begin_layout LyX-Code
#address-cells = <1>;
\end_layout
\begin_layout LyX-Code
#size-cells = <0>;
\end_layout
\begin_layout LyX-Code
emulation,qemu-i386@0{
\end_layout
\begin_layout LyX-Code
name = "emulation,qemu-i386";
\end_layout
\begin_layout LyX-Code
device_type = "cpu";
\end_layout
\begin_layout LyX-Code
clock-frequency = <5f5e1000>;
\end_layout
\begin_layout LyX-Code
timebase-frequency = <1FCA055>;
\end_layout
\begin_layout LyX-Code
linux,boot-cpu;
\end_layout
\begin_layout LyX-Code
reg = <0>;
\end_layout
\begin_layout LyX-Code
i-cache-size = <2000>;
\end_layout
\begin_layout LyX-Code
d-cache-size = <2000>;
\end_layout
\begin_layout LyX-Code
};
\end_layout
\begin_layout LyX-Code
};
\end_layout
\begin_layout LyX-Code
memory@0 {
\end_layout
\begin_layout LyX-Code
device_type = "memory";
\end_layout
\begin_layout LyX-Code
reg = <00000000 20000000>;
\end_layout
\begin_layout LyX-Code
};
\end_layout
\begin_layout LyX-Code
/* the I/O stuff */
\end_layout
\begin_layout LyX-Code
northbridge,intel,440bx{
\end_layout
\begin_layout LyX-Code
associated-cpu = <&/cpus/emulation,qemu-i386@0>;
\end_layout
\begin_layout LyX-Code
southbridge,intel,piix4{
\end_layout
\begin_layout LyX-Code
superio,nsc,sucks{
\end_layout
\begin_layout LyX-Code
uart@0{
\end_layout
\begin_layout LyX-Code
enabled=<1>;
\end_layout
\begin_layout LyX-Code
};
\end_layout
\begin_layout LyX-Code
};
\end_layout
\begin_layout LyX-Code
};
\end_layout
\begin_layout LyX-Code
};
\end_layout
\begin_layout LyX-Code
\end_layout
\begin_layout LyX-Code
chosen {
\end_layout
\begin_layout LyX-Code
bootargs = "root=/dev/sda2";
\end_layout
\begin_layout LyX-Code
linux,platform = <00000600>;
\end_layout
\begin_layout LyX-Code
linux,stdout-path="/dev/ttyS0";
\end_layout
\begin_layout LyX-Code
};
\end_layout
\begin_layout LyX-Code
\end_layout
\begin_layout LyX-Code
options {
\end_layout
\begin_layout LyX-Code
normal="normal";
\end_layout
\begin_layout LyX-Code
fallback="fallback";
\end_layout
\begin_layout LyX-Code
};
\end_layout
\begin_layout LyX-Code
};
\end_layout
\begin_layout LyX-Code
\end_layout
\end_inset
\end_layout
\begin_layout Standard
\begin_inset Note Comment
status collapsed
\begin_layout Standard
\begin_inset LatexCommand \bibtex[latex8]{yourbibfile}
\end_inset
\end_layout
\end_inset
\end_layout
\begin_layout Section
The major change -- the death of the static tree
\end_layout
\begin_layout Standard
We made a decision on 12/2/2006 in the conference calle, We are going to
try to remove the linux static.c from linuxbios, and center all our work
on the OFW device tree.
\end_layout
\begin_layout Standard
Hence, we need an idea of how this works.
EVERY structure dereference in the linuxbios code will now be an OFW-style
property operation.
\end_layout
\begin_layout Standard
To see if this is posisble, we are ging to work through the linuxbios code
and see how it would look.
\end_layout
\begin_layout Standard
Here we go!
\end_layout
\begin_layout Subsection
basic startup and CAR (in most cases, same for all processors of a given
type)
\end_layout
\begin_layout Standard
No change currently.
\end_layout
\begin_layout Subsection
Pre-initram device setup (large FLASH, serial port, etc.)
\end_layout
\begin_layout Quote
\end_layout
\begin_layout Subsection
initram
\end_layout
\begin_layout Subsection
Traditional linuxbios ram code (LAR, etc.)
\end_layout
\begin_layout Subsection
Load payload and start it
\end_layout
\begin_layout Section
Conclusions
\end_layout
\begin_layout Standard
This is great stuff.
\end_layout
\begin_layout Section
Appendix A: issues
\end_layout
\begin_layout Itemize
One issue I thought I should mention before all the tools start >> making
incorrect assumptions: on most non-x86 architectures, the >> bootblock
is at the start of the flash, not at the end.
The general >> structure of the flash layout can stay the same on such
systems, >> just flipped upside down.
\end_layout
\begin_layout Itemize
move over to the xorg emulator, drop the one we have now as it is not complete
enough.
\end_layout
\begin_layout Section
Comments from Peter Stuge
\end_layout
\begin_layout Itemize
* Ridiculous and error-prone to require commands in three dirs for a build.
(Edit targets/foo/bar/Config.lb, run ./buildtarget foo/bar in targets and
finally cd targets/foo/bar/baz to make.) (Deps fail on reconfig, I've gotten
the wrong payload a couple of times causing annoying extra reboots/hotswaps/fla
shes.)
\end_layout
\begin_layout Itemize
* Flash ROM size needs to affect one option, and one option only.
Maybe even autodetect it for those building on the target.
All other sizes can and MUST be derived from this value.
Also: What about option ROMs? Should we aim to produce a ready-to-use lb-2.0-epi
a.rom and require a correct (how carefully do we check?) vgabios.rom in order
to build with VGA support - or just dump a half- finished product in the
user's lap and require them to finish the puzzle on their own? Licensing
issues? Is "cat" considered "linking"?
\end_layout
\begin_layout Itemize
* Any redundancy in the config/build process should be removed.
I must not need to type the target name more than once.
Brings me to..
\end_layout
\begin_layout Itemize
* Global vs.
local builds - pros/cons with kernel style (global) build (always produces
arch/x/*Image) and LBv2 style build (produces target/x/y/z/linuxbios.rom
for each target) Either way the config/build system must be consistently
either global or local.
\end_layout
\begin_layout Itemize
* Support for target variants? Same mobo with/without certain parts populated.
Perhaps just sets of default options that can be pre-selected as a base
config and then still allow user to change whatever they want.
(Kconfig has just one variant per arch, right?)
\end_layout
\begin_layout Itemize
..basically we want a system that is able to do very complex detailed configuratio
ns but that's also able to hide all the details behind "512KiB EPIA-MII
6000E without CF addon" (hypothetical example)
\end_layout
\begin_layout Itemize
Some boards will require more from the user, but when possible a config
and build should be dirt simple.
\end_layout
\begin_layout Itemize
One idea is a kind of iterative config with increasing resolution per iteration.
Novice users with a known-good board need only complete the first iteration:
flash size, board name and board variant if any.
Further iterations are optional and allow increasingly specific settings.
Think fdisk normal/expert mode.
\end_layout
\begin_layout Itemize
* Payload.
I say something must be included in the LB tree or trivially added to a
tree by download or command.
FILO is candidate for inclusion.
What's up with FILO(EB) and FILO(LB) ? Merge them? Make EB default payload?
FILO? memtest86? All about making a usable product.
memtest86 would have to be explicitly selected in expert mode in favor
of the default option that would be able to load an OS.
Doesn't matter much if it's only Linux right now because that's the most
likely boot candidate for early LB adopters.
\end_layout
\begin_layout Itemize
* Payload config.
Long/tedious for EB, simple default for boards with onboard LAN, what to
do otherwise? Tricky for FILO.
(e.g.
EPIA-MII CF boot requires IDE+!PCI, !PCI requires !USB or build fails)
filesystems, devices, etc.
\end_layout
\begin_layout Itemize
* Kernel payload and payload utilities - where to get mkelfImage? I had
to look hard.
Should it be downloaded on demand? Perhaps after the user chooses her payload?
Think cygwin installer that downloads selected packages.
Maybe a bad idea.
\end_layout
\begin_layout Itemize
* Consistent terminology - the payload seems to have many names in the decompres
sion code.
;)
\end_layout
\end_body
\end_document

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/* the standard linuxbios include file has constant definitions, types and so on */
#include <linuxbios.h>
#if 0
/* NOTES */
/* support library code. */
src/LinuxBIOSv2/src/cpu/x86/lapic/boot_cpu.c -- which cpu is the boot cpu
src/LinuxBIOSv2/src/northbridge/amd/amdk8/reset_test.c -- determine if we had a reset -- hard or soft
src/LinuxBIOSv2/src/cpu/amd/mtrr/amd_earlymtrr.c -- early mtrr setup
/* this is currently used but may be replaced by properties for the CPUs */
northbridge/amd/amdk8/setup_resource_map.c -- map of 18.1 device for routing
#include "southbridge/nvidia/ck804/ck804_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
#endif
/* there is a global struct used by main, that is the dtb tree */
/* it is built when the linuxbios image is built */
/* it is linked in, as it is generated as a C struct */
extern struct dtb *dtb;
/* basic ugly crud that is not at all elegant ... very mainboard specific, has to be done this way */
static void stage1_superio_setup(void)
{
struct property *superio;
unsigned value;
uint32_t dword;
uint8_t byte;
superio = get_property(dtb, "ck804");
/* read dev 1 , function 0, of the superio, */
byte = pci_read_config8(superio, 1, 0, 0x7b);
byte |= 0x20;
pci_write_config8(superio, 1, 0, 0x7b, byte);
dword = pci_read_config32(superio, 1, 0, 0xa0);
dword |= (1<<0);
pci_write_config32(superio, 1, 0, 0xa0, dword);
}
/* assumptions: when we get here, we have a small region of cache-as-ram usable as a stack.
* we have the DTB in flash. bist (built-in-self-test) and cpu_init_detectedx are set by CAR code.
* This code is common to both fallback and normal images, so we do it in pre_initram support.
*/
/* what we have to do:
* enable console(s)
* make the processors sane
* do initial hardware enable
*/
void stage1(unsigned long bist, unsigned long cpu_init_detectedx)
{
struct property *image;
struct property *uart;
struct LAR_dir *dir;
struct LAR_file *file;
struct LAR_file *decompressor;
void (*code)():
int needs_reset;
unsigned bsp_apicid = 0;
struct mem_controller ctrl[8];
unsigned nodes;
unsigned last_boot_normal_x = last_boot_normal(); /* from CMOS */
/* Is this a cpu only reset? or Is this a secondary cpu? */
/* cpu only means we came here before, set up some basic things (e.g. hypertransport),
* and found that as part of that we had to reset the CPU to get the bus set up correctly.
* Secondary CPUs do less work than primary CPUs (on K8) and hence do not need to
* do some of the more primitive setup operations (such as setting up routing tables)
*/
if ((cpu_init_detectedx) || (!boot_cpu())) {
if (last_boot_normal_x) {
image = get_property(dtb, "normal");
} else {
image = get_property(dtb, "fallback");
}
} else {
/* we are here because we need to set up baseline hardware after a full reset or power cycle */
/* Nothing special needs to be done to find bus 0 */
/* Allow the HT devices to be found */
/* note that this will be filling in the DTB! */
stage1_enumerate_ht_chain();
uart = get_property(dtb, "uart");
stage1_sio_setup(uart);
/* Setup the ck804 */
stage1_ck804_enable_rom();
/* Is this a deliberate reset by the bios */
if (bios_reset_detected() && last_boot_normal_x) {
image = get_property(dtb, "normal");
}
/* This is the primary cpu; is this a normal or fallback boot? Determined mostly by CMOS settings */
else if (do_normal_boot()) {
image = get_property(dtb, "normal");
} else {
image = get_property(dtb, "fallback");
}
}
/* now, using the image property as a directory name, make the LAR calls to run files in the
* directory. Uncompress as needed. Names are as in the LInux dentry cache, pointer + length
*/
dir = LAR_lookup(image->val.val, image->val.len);
dir = LAR_walk(dir, "stage2");
/* LAR_walk walks from a directory to another directory or file */
file = LAR_walk(dir, "initram");
if (! file) {
/*uh oh!*/
}
/* initram is uncompressed. */
code = code_pointer(file);
/* we have to chain to the rest of LinuxBIOS, since CAR will go away */
/* The stack will be gone. Pass two parameters to the initram:
* pointer to function to run when initram is done, and property for booting.
*/
(*code)(stage1_run_stage2, image);
}
void
stage1_run_stage2(struct property *image){
struct property *uart;
struct LAR_dir *dir;
struct LAR_file *file = NULL;
struct LAR_file *decompressor;
void (*code)();
dir = LAR_lookup(image->val.val, image->val.len);
dir = LAR_walk(dir, "stage2");
/* LAR_next just walks to the next file from the current one */
while (file = LAR_next(dir, file)) {
if (! strcmp(file->name, "initram"))
continue;
decompressor = find_decompressor(file);
/* if the decompressor is null, then the function
* just returns a pointer to the start of the file in FLASH
*/
code = run_decompressor(file, decompressor);
if (! code) {
/* it's a bad day! */
}
(*code)();
}
/* NOTREACHED -- last file runs the payload */
}

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/* the standard linuxbios include file has constant definitions, types and so on */
#include <linuxbios.h>
/* support library code. */
src/LinuxBIOSv2/src/cpu/x86/lapic/boot_cpu.c -- which cpu is the boot cpu
src/LinuxBIOSv2/src/northbridge/amd/amdk8/reset_test.c -- determine if we had a reset -- hard or soft
src/LinuxBIOSv2/src/cpu/amd/mtrr/amd_earlymtrr.c -- early mtrr setup
/* this is currently used but may be replaced by properties for the CPUs */
northbridge/amd/amdk8/setup_resource_map.c -- map of 18.1 device for routing
#define CK804_NUM 1
#include "southbridge/nvidia/ck804/ck804_early_setup_ss.h"
//set GPIO to input mode
#define CK804_MB_SETUP \
RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+15, ~(0xff), ((0<<4)|(0<<2)|(0<<0)),/* M8,GPIO16, PCIXA_PRSNT2_L*/ \
RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+44, ~(0xff), ((0<<4)|(0<<2)|(0<<0)),/* P5,GPIO45, PCIXA_PRSNT1_L*/ \
RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+16, ~(0xff), ((0<<4)|(0<<2)|(0<<0)),/* K4,GPIO17, PCIXB_PRSNT1_L*/ \
RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+45, ~(0xff), ((0<<4)|(0<<2)|(0<<0)),/* P7,GPIO46, PCIXB_PRSNT2_L*/ \
/* there is a global struct used by main, that is the dtb tree */
/* it is built when the linuxbios image is built */
/* it is linked in, as it is generated as a C struct */
extern struct dtb *dtb;
/* assumptions: when we get here, we have a small region of cache-as-ram usable as a stack.
* we have the DTB in flash. bist (built-in-self-test) and cpu_init_detectedx are set by CAR code.
*/
/* what we have to do:
* enable console(s)
* make the processors sane
* figure out what memory is there and turn it on
* do initial hardware enable
*/
void main(unsigned long bist, unsigned long cpu_init_detectedx)
{
struct property *spd;
int spdsize;
struct property *uart;
u16 *spd_addr;
struct property *image;
struct property *uart;
int needs_reset;
unsigned bsp_apicid = 0;
struct mem_controller ctrl[8];
unsigned nodes;
unsigned last_boot_normal_x = last_boot_normal(); /* from CMOS */
/* fill in the SPD entries from the properties.
* the SPD properties are an array of shorts
*/
spd = get_property(dtb, "spd");
if (! spd) /* now what? */
fatal("no SPD properties");
spdsize = spd->val.len / sizeof(uint16);
spd_addr = malloc(spdsize * sizeof(*spd_addr));
for(I = 0; i < spdsize; i++)
spd_addr[i] = be16_to_cpu(*((u32 *)(d.val+i))));
/* we now have the spd addresses from the DTB */
/* There are several ways we could be here. We could be power-on reset,
* in which case we have to init a lot of things. We could be cpu-only reset,
* in which case we just have to clean up the cpu. We could be the
* Attached Processor (AP), in which case it is a lot like a cpu-only reset,
* since a lot of the setup has been done by the Boot Strap Processor (BSP or BP)
*/
if (bist == 0) {
init_cpus(cpu_init_detectedx);
}
uart = get_property(dtb, "uart");
w83627hf_enable_serial(uart);
uart_init(uart);
console_init(uart);
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
setup_s2892_resource_map(dtb);
#if 0
dump_pci_device(PCI_DEV(0, 0x18, 0));
dump_pci_device(PCI_DEV(0, 0x19, 0));
#endif
needs_reset = setup_coherent_ht_domain(dtb);
wait_all_core0_started(dtb);
/* this should be determined from dtb. */
numcpus = get_value(dtb, "#cpus");
#if CONFIG_LOGICAL_CPUS==1
// It is said that we should start core1 after all core0 launched
start_other_cores();
wait_all_other_cores_started(bsp_apicid);
#endif
needs_reset |= ht_setup_chains_x(dtb);
needs_reset |= ck804_early_setup_x(dtb);
if (needs_reset) {
print_info("ht reset -\r\n");
soft_reset();
}
allow_all_aps_stop(bsp_apicid);
nodes = get_nodes(dtb);
//It's the time to set ctrl now;
fill_mem_ctrl(nodes, ctrl, spd_addr);
enable_smbus(dtb);
#if 0
dump_spd_registers(&cpu[0]);
#endif
#if 0
dump_smbus_registers();
#endif
memreset_setup(dtb);
sdram_initialize(dtb, nodes, ctrl);
#if 0
print_pci_devices();
#endif
#if 0
dump_pci_devices();
#endif
post_cache_as_ram();
}