From 15f8ac0716b04573195b544fe0ffdc11ecfa4e5a Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Mon, 9 Jan 2017 22:23:39 -0800 Subject: [PATCH] UPSTREAM: skylake: Do not pass VBT to FSP if display init not required The FSP 2.0 change broke the logic for determining whether or not to execute the GOP binary. Modify the FSP 2.0 code to do the right thing and check for display_init_required() before passing VBT into FSP and the GOP binary. BUG=chrome-os-partner:61726 TEST=disable developer mode and ensure FSP does not run GOP Change-Id: I9c607739eb791bbb4351059d2528c194328f6b95 Signed-off-by: Patrick Georgi Original-Commit-Id: 7d484106319a0f4261eb17326dd9fe31e2d4e401 Original-Change-Id: I7fc8055b6664e0cf231a8de34367406eb049dfe1 Original-Signed-off-by: Duncan Laurie Original-Reviewed-on: https://review.coreboot.org/18084 Original-Reviewed-by: Aaron Durbin Original-Tested-by: build bot (Jenkins) Reviewed-on: https://chromium-review.googlesource.com/428248 Commit-Ready: Aaron Durbin --- src/soc/intel/skylake/chip_fsp20.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c index a1e76a9d39..2aef65af29 100644 --- a/src/soc/intel/skylake/chip_fsp20.c +++ b/src/soc/intel/skylake/chip_fsp20.c @@ -14,6 +14,7 @@ */ #include +#include #include #include #include @@ -108,9 +109,18 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) mainboard_silicon_init_params(params); /* Load VBT */ - if (!is_s3_wakeup) + if (is_s3_wakeup) { + printk(BIOS_DEBUG, "S3 resume do not pass VBT to GOP\n"); + } else if (display_init_required()) { + /* Get VBT data */ vbt_data = fsp_load_vbt(); - + if (vbt_data) + printk(BIOS_DEBUG, "Passing VBT to GOP\n"); + else + printk(BIOS_DEBUG, "VBT not found!\n"); + } else { + printk(BIOS_DEBUG, "Not passing VBT to GOP\n"); + } params->GraphicsConfigPtr = (u32) vbt_data; for (i = 0; i < ARRAY_SIZE(config->usb2_ports); i++) {