Emulation/switch-coreboot
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It's a good idea to set up the segment registers.

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Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/coreboot-v3@812 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Ronald G. Minnich 2008-08-24 07:08:17 +00:00
parent 081602b211
commit 1238065ace
1 changed files with 15 additions and 0 deletions
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15
arch/x86/amd/stage0.S
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@ -163,6 +163,21 @@ __protected_stage0:
/* Save the BIST result */ /* Save the BIST result */
movl %eax, %ebp movl %eax, %ebp
/* Save the BIST value. */
movl %eax, %ebp
port80_post(0x01)
movw $ROM_DATA_SEG, %ax
movw %ax, %ds
movw %ax, %es
movw %ax, %ss
movw %ax, %fs
movw %ax, %gs
/* Restore the BIST value to %eax. */
movl %ebp, %eax
/*for normal part %ebx already contain cpu_init_detected from fallback call */ /*for normal part %ebx already contain cpu_init_detected from fallback call */
cache_as_ram_setup: cache_as_ram_setup: