mb/google/poppy: Config GPIO for DMIC by different sku id

BUG=b:74177699
BRANCH=poppy
TEST=Verify audio recorder function by different SKU ID

Change-Id: Ic6570703f6ab4a1b03cbba8370fc0f597ab6bcf2
Signed-off-by: amanda_hwang <amanda_hwang@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/25148
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
amanda_hwang 2018-03-16 13:43:52 +08:00 committed by Martin Roth
parent c4276a3fdc
commit 04ccd5f9b5
6 changed files with 70 additions and 10 deletions

View file

@ -25,6 +25,8 @@ void mainboard_silicon_init_params(FSP_SIL_UPD *params)
variant_devtree_update();
pads = variant_gpio_table(&num);
gpio_configure_pads(pads, num);
pads = variant_sku_gpio_table(&num);
gpio_configure_pads(pads, num);
}
void __attribute__((weak)) variant_devtree_update(void)

View file

@ -384,6 +384,14 @@ const struct pad_config * __attribute__((weak))
return early_gpio_table;
}
/* override specific gpio by sku id */
const struct pad_config * __attribute__((weak))
variant_sku_gpio_table(size_t *num)
{
*num = 0;
return NULL;
}
static const struct cros_gpio cros_gpios[] = {
CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME),
CROS_GPIO_WP_AH(GPIO_PCH_WP, CROS_GPIO_DEVICE_NAME),

View file

@ -28,6 +28,8 @@ const struct pad_config *variant_gpio_table(size_t *num);
const struct pad_config *variant_early_gpio_table(size_t *num);
const struct cros_gpio *variant_cros_gpios(size_t *num);
/* Config gpio by different sku id */
const struct pad_config *variant_sku_gpio_table(size_t *num);
enum memory_type {
MEMORY_LPDDR3,
@ -51,6 +53,7 @@ struct memory_params {
void variant_memory_params(struct memory_params *p);
int variant_memory_sku(void);
void variant_devtree_update(void);
uint16_t variant_board_sku(void);
struct nhlt;
void variant_nhlt_init(struct nhlt *nhlt);

View file

@ -16,6 +16,7 @@
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
#include <commonlib/helpers.h>
#include <variant/sku.h>
/* Pad configuration in ramstage */
/* Leave eSPI pins untouched from default settings */
@ -194,8 +195,6 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NC(GPP_D15),
/* D16 : ISH_UART0_CTS# ==> NC */
PAD_CFG_NC(GPP_D16),
/* D17 : DMIC_CLK1 ==> SOC_DMIC_CLK1 */
PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1),
/* D18 : DMIC_DATA1 ==> SOC_DMIC_DATA1 */
PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1),
/* D19 : DMIC_CLK0 ==> SOC_DMIC_CLK0 */
@ -386,3 +385,31 @@ const struct pad_config *variant_early_gpio_table(size_t *num)
*num = ARRAY_SIZE(early_gpio_table);
return early_gpio_table;
}
static const struct pad_config nami_default_sku_gpio_table[] = {
/* D17 : DMIC_CLK1 ==> SOC_DMIC_CLK1 */
PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1),
};
static const struct pad_config vayne_sku_gpio_table[] = {
/* D17 : DMIC_CLK1 ==> NC */
PAD_CFG_NC(GPP_D17),
};
const struct pad_config *variant_sku_gpio_table(size_t *num)
{
uint16_t sku_id = variant_board_sku();
const struct pad_config *board_gpio_tables;
switch (sku_id) {
case SKU_1_VAYNE:
case SKU_2_VAYNE:
*num = ARRAY_SIZE(vayne_sku_gpio_table);
board_gpio_tables = vayne_sku_gpio_table;
break;
default:
*num = ARRAY_SIZE(nami_default_sku_gpio_table);
board_gpio_tables = nami_default_sku_gpio_table;
break;
}
return board_gpio_tables;
}

View file

@ -0,0 +1,24 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2018 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __MAINBOARD_SKU_H__
#define __MAINBOARD_SKU_H__
#define SKU_UNKNOWN 0xFFFF
#define SKU_0_NAMI 0x3A7B
#define SKU_1_VAYNE 0x3A63
#define SKU_2_VAYNE 0x3A7F
#endif /* __MAINBOARD_SKU_H__ */

View file

@ -22,13 +22,9 @@
#include <smbios.h>
#include <soc/ramstage.h>
#include <string.h>
#include <variant/sku.h>
#define SKU_UNKNOWN 0xFFFF
#define SKU_0_NAMI 0x3A7B
#define SKU_1_VAYNE 0x3A63
#define SKU_2_VAYNE 0x3A7F
static uint16_t board_sku_id(void)
uint16_t variant_board_sku(void)
{
static int sku_id = -1;
uint32_t id;
@ -43,7 +39,7 @@ static uint16_t board_sku_id(void)
void variant_devtree_update(void)
{
/* Override dev tree settings per board */
uint16_t sku_id = board_sku_id();
uint16_t sku_id = variant_board_sku();
device_t root = SA_DEV_ROOT;
config_t *cfg = root->chip_info;
switch (sku_id) {
@ -59,7 +55,7 @@ const char *smbios_mainboard_sku(void)
{
static char sku_str[9]; /* sku{0..65535} (basically up to FFFF) */
snprintf(sku_str, sizeof(sku_str), "sku%d", board_sku_id());
snprintf(sku_str, sizeof(sku_str), "sku%d", variant_board_sku());
return sku_str;
}