mb/*/*/cmos.layout: Make multibyte options byte aligned

Changes the offsets of some options so that options that span multiple
bytes are byte aligned.

To make the cmos.layout file more consistent some things where moved
around in the cmos.layout of thinkpads X200 and T400.

Change-Id: Ic84a2a5dc6f9c102f041085871c2ed55e2f3692a
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/18321
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Arthur Heymans 2017-02-08 18:12:31 +01:00 committed by Nico Huber
parent b40e5c72b7
commit 00b9f4c4b1
18 changed files with 75 additions and 67 deletions

View file

@ -69,11 +69,11 @@ entries
#1000 24 r 0 amd_reserved #1000 24 r 0 amd_reserved
#save timestamps in pre-ram boot areas #save timestamps in pre-ram boot areas
1719 64 h 0 timestamp_value1 1720 64 h 0 timestamp_value1
1783 64 h 0 timestamp_value2 1784 64 h 0 timestamp_value2
1847 64 h 0 timestamp_value3 1848 64 h 0 timestamp_value3
1911 64 h 0 timestamp_value4 1912 64 h 0 timestamp_value4
1975 64 h 0 timestamp_value5 1976 64 h 0 timestamp_value5
# ----------------------------------------------------------------- # -----------------------------------------------------------------

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@ -22,13 +22,14 @@ entries
384 1 e 4 boot_option 384 1 e 4 boot_option
388 4 h 0 reboot_counter 388 4 h 0 reboot_counter
393 3 e 5 baud_rate 393 3 e 5 baud_rate
396 5 e 10 ecc_scrub_rate #396 5 unused
401 1 e 1 interleave_chip_selects 401 1 e 1 interleave_chip_selects
402 1 e 1 interleave_nodes 402 1 e 1 interleave_nodes
403 1 e 1 interleave_memory_channels 403 1 e 1 interleave_memory_channels
404 2 e 8 max_mem_clock 404 2 e 8 max_mem_clock
406 1 e 2 multi_core 406 1 e 2 multi_core
412 4 e 6 debug_level 412 4 e 6 debug_level
416 5 e 10 ecc_scrub_rate
440 4 e 9 slow_cpu 440 4 e 9 slow_cpu
444 1 e 1 nmi 444 1 e 1 nmi
445 1 e 1 gart 445 1 e 1 gart

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@ -22,13 +22,14 @@ entries
384 1 e 4 boot_option 384 1 e 4 boot_option
388 4 h 0 reboot_counter 388 4 h 0 reboot_counter
393 3 e 5 baud_rate 393 3 e 5 baud_rate
396 5 e 10 ecc_scrub_rate #396 5 unused
401 1 e 1 interleave_chip_selects 401 1 e 1 interleave_chip_selects
402 1 e 1 interleave_nodes 402 1 e 1 interleave_nodes
403 1 e 1 interleave_memory_channels 403 1 e 1 interleave_memory_channels
404 4 e 8 max_mem_clock 404 4 e 8 max_mem_clock
408 1 e 2 multi_core 408 1 e 2 multi_core
412 4 e 6 debug_level 412 4 e 6 debug_level
416 5 e 10 ecc_scrub_rate
440 4 e 9 slow_cpu 440 4 e 9 slow_cpu
444 1 e 1 nmi 444 1 e 1 nmi
445 1 e 1 gart 445 1 e 1 gart
@ -42,7 +43,7 @@ entries
466 1 e 1 cpu_cc6_state 466 1 e 1 cpu_cc6_state
467 1 e 1 sata_ahci_mode 467 1 e 1 sata_ahci_mode
468 1 e 1 sata_alpm 468 1 e 1 sata_alpm
469 4 h 0 maximum_p_state_limit #469 4 unused
473 2 e 13 dimm_spd_checksum 473 2 e 13 dimm_spd_checksum
475 1 e 14 probe_filter 475 1 e 14 probe_filter
476 1 e 1 l3_cache_partitioning 476 1 e 1 l3_cache_partitioning
@ -51,6 +52,7 @@ entries
480 1 e 2 ehci_async_data_cache 480 1 e 2 ehci_async_data_cache
481 1 e 1 experimental_memory_speed_boost 481 1 e 1 experimental_memory_speed_boost
482 1 r 0 allow_spd_nvram_cache_restore 482 1 r 0 allow_spd_nvram_cache_restore
483 4 h 0 maximum_p_state_limit
728 256 h 0 user_data 728 256 h 0 user_data
984 16 h 0 check_sum 984 16 h 0 check_sum
# Reserve the extended AMD configuration registers # Reserve the extended AMD configuration registers

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@ -22,13 +22,14 @@ entries
384 1 e 4 boot_option 384 1 e 4 boot_option
388 4 h 0 reboot_counter 388 4 h 0 reboot_counter
393 3 e 5 baud_rate 393 3 e 5 baud_rate
396 5 e 10 ecc_scrub_rate #396 5 unused
401 1 e 1 interleave_chip_selects 401 1 e 1 interleave_chip_selects
402 1 e 1 interleave_nodes 402 1 e 1 interleave_nodes
403 1 e 1 interleave_memory_channels 403 1 e 1 interleave_memory_channels
404 2 e 8 max_mem_clock 404 2 e 8 max_mem_clock
406 1 e 2 multi_core 406 1 e 2 multi_core
412 4 e 6 debug_level 412 4 e 6 debug_level
416 5 e 10 ecc_scrub_rate
440 4 e 9 slow_cpu 440 4 e 9 slow_cpu
444 1 e 1 nmi 444 1 e 1 nmi
445 1 e 1 gart 445 1 e 1 gart

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@ -22,13 +22,14 @@ entries
384 1 e 4 boot_option 384 1 e 4 boot_option
388 4 h 0 reboot_counter 388 4 h 0 reboot_counter
393 3 e 5 baud_rate 393 3 e 5 baud_rate
396 5 e 10 ecc_scrub_rate #396 5 unused
401 1 e 1 interleave_chip_selects 401 1 e 1 interleave_chip_selects
402 1 e 1 interleave_nodes 402 1 e 1 interleave_nodes
403 1 e 1 interleave_memory_channels 403 1 e 1 interleave_memory_channels
404 4 e 8 max_mem_clock 404 4 e 8 max_mem_clock
408 1 e 2 multi_core 408 1 e 2 multi_core
412 4 e 6 debug_level 412 4 e 6 debug_level
416 5 e 10 ecc_scrub_rate
440 4 e 9 slow_cpu 440 4 e 9 slow_cpu
444 1 e 1 nmi 444 1 e 1 nmi
445 1 e 1 gart 445 1 e 1 gart
@ -42,7 +43,7 @@ entries
466 1 e 1 cpu_cc6_state 466 1 e 1 cpu_cc6_state
467 1 e 1 sata_ahci_mode 467 1 e 1 sata_ahci_mode
468 1 e 1 sata_alpm 468 1 e 1 sata_alpm
469 4 h 0 maximum_p_state_limit #469 4 unused
473 2 e 13 dimm_spd_checksum 473 2 e 13 dimm_spd_checksum
475 1 e 14 probe_filter 475 1 e 14 probe_filter
476 1 e 1 l3_cache_partitioning 476 1 e 1 l3_cache_partitioning
@ -52,6 +53,7 @@ entries
480 1 e 2 ehci_async_data_cache 480 1 e 2 ehci_async_data_cache
481 1 e 1 experimental_memory_speed_boost 481 1 e 1 experimental_memory_speed_boost
482 1 r 0 allow_spd_nvram_cache_restore 482 1 r 0 allow_spd_nvram_cache_restore
483 4 h 0 maximum_p_state_limit
728 256 h 0 user_data 728 256 h 0 user_data
984 16 h 0 check_sum 984 16 h 0 check_sum
# Reserve the extended AMD configuration registers # Reserve the extended AMD configuration registers

View file

@ -70,11 +70,11 @@ entries
#1000 24 r 0 amd_reserved #1000 24 r 0 amd_reserved
#save timestamps in pre-ram boot areas #save timestamps in pre-ram boot areas
1719 64 h 0 timestamp_value1 1720 64 h 0 timestamp_value1
1783 64 h 0 timestamp_value2 1784 64 h 0 timestamp_value2
1847 64 h 0 timestamp_value3 1848 64 h 0 timestamp_value3
1911 64 h 0 timestamp_value4 1912 64 h 0 timestamp_value4
1975 64 h 0 timestamp_value5 1976 64 h 0 timestamp_value5
# ----------------------------------------------------------------- # -----------------------------------------------------------------

View file

@ -22,13 +22,14 @@ entries
384 1 e 4 boot_option 384 1 e 4 boot_option
388 4 h 0 reboot_counter 388 4 h 0 reboot_counter
393 3 e 5 baud_rate 393 3 e 5 baud_rate
396 5 e 10 ecc_scrub_rate #396 5 unused
401 1 e 1 interleave_chip_selects 401 1 e 1 interleave_chip_selects
402 1 e 1 interleave_nodes 402 1 e 1 interleave_nodes
403 1 e 1 interleave_memory_channels 403 1 e 1 interleave_memory_channels
404 2 e 8 max_mem_clock 404 2 e 8 max_mem_clock
406 1 e 2 multi_core 406 1 e 2 multi_core
412 4 e 6 debug_level 412 4 e 6 debug_level
416 5 e 10 ecc_scrub_rate
440 4 e 9 slow_cpu 440 4 e 9 slow_cpu
444 1 e 1 nmi 444 1 e 1 nmi
445 1 e 1 gart 445 1 e 1 gart

View file

@ -69,11 +69,11 @@ entries
#1000 24 r 0 amd_reserved #1000 24 r 0 amd_reserved
#save timestamps in pre-ram boot areas #save timestamps in pre-ram boot areas
1719 64 h 0 timestamp_value1 1720 64 h 0 timestamp_value1
1783 64 h 0 timestamp_value2 1784 64 h 0 timestamp_value2
1847 64 h 0 timestamp_value3 1848 64 h 0 timestamp_value3
1911 64 h 0 timestamp_value4 1912 64 h 0 timestamp_value4
1975 64 h 0 timestamp_value5 1976 64 h 0 timestamp_value5
# ----------------------------------------------------------------- # -----------------------------------------------------------------

View file

@ -70,11 +70,11 @@ entries
#1000 24 r 0 amd_reserved #1000 24 r 0 amd_reserved
#save timestamps in pre-ram boot areas #save timestamps in pre-ram boot areas
1719 64 h 0 timestamp_value1 1720 64 h 0 timestamp_value1
1783 64 h 0 timestamp_value2 1784 64 h 0 timestamp_value2
1847 64 h 0 timestamp_value3 1848 64 h 0 timestamp_value3
1911 64 h 0 timestamp_value4 1912 64 h 0 timestamp_value4
1975 64 h 0 timestamp_value5 1976 64 h 0 timestamp_value5
# ----------------------------------------------------------------- # -----------------------------------------------------------------

View file

@ -69,11 +69,11 @@ entries
#1000 24 r 0 amd_reserved #1000 24 r 0 amd_reserved
#save timestamps in pre-ram boot areas #save timestamps in pre-ram boot areas
1719 64 h 0 timestamp_value1 1720 64 h 0 timestamp_value1
1783 64 h 0 timestamp_value2 1784 64 h 0 timestamp_value2
1847 64 h 0 timestamp_value3 1848 64 h 0 timestamp_value3
1911 64 h 0 timestamp_value4 1912 64 h 0 timestamp_value4
1975 64 h 0 timestamp_value5 1976 64 h 0 timestamp_value5
# ----------------------------------------------------------------- # -----------------------------------------------------------------

View file

@ -61,14 +61,13 @@ entries
408 1 e 1 nmi 408 1 e 1 nmi
409 2 e 7 power_on_after_fail 409 2 e 7 power_on_after_fail
411 1 e 11 sata_mode 411 1 e 11 sata_mode
#412 4 r 0 unused
# coreboot config options: additional mainboard options # coreboot config options: additional mainboard options
416 4 e 10 systemp_type 412 4 e 10 systemp_type
420 7 h 0 fan1_min 416 7 h 0 fan1_min
427 7 h 0 fan1_max 424 7 h 0 fan1_max
434 7 h 0 fan2_min 432 7 h 0 fan2_min
441 7 h 0 fan2_max 440 7 h 0 fan2_max
# coreboot config options: bootloader # coreboot config options: bootloader
448 64 r 0 write_protected_by_bios 448 64 r 0 write_protected_by_bios

View file

@ -65,23 +65,21 @@ entries
413 1 e 1 wwan 413 1 e 1 wwan
414 1 e 1 wlan 414 1 e 1 wlan
415 1 e 1 trackpoint 415 1 e 1 trackpoint
416 1 e 1 fn_ctrl_swap 416 8 h 0 volume
417 1 e 1 sticky_fn 424 1 e 1 fn_ctrl_swap
425 1 e 1 sticky_fn
426 1 e 1 power_management_beeps
427 1 e 1 low_battery_beep
428 1 e 1 uwb
# coreboot config options: bootloader # coreboot config options: bootloader
418 512 s 0 boot_devices 432 512 s 0 boot_devices
930 8 h 0 boot_default 944 8 h 0 boot_default
938 1 e 1 power_management_beeps
939 1 e 1 low_battery_beep
940 1 e 1 uwb
# coreboot config options: northbridge # coreboot config options: northbridge
944 2 e 12 hybrid_graphics_mode 952 2 e 12 hybrid_graphics_mode
946 4 e 11 gfx_uma_size 954 4 e 11 gfx_uma_size
# coreboot config options: EC
952 8 h 0 volume
# coreboot config options: check sums # coreboot config options: check sums
984 16 h 0 check_sum 984 16 h 0 check_sum

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@ -65,20 +65,19 @@ entries
413 1 e 1 wwan 413 1 e 1 wwan
414 1 e 1 wlan 414 1 e 1 wlan
415 1 e 1 trackpoint 415 1 e 1 trackpoint
416 1 e 1 fn_ctrl_swap 416 8 h 0 volume
417 1 e 1 sticky_fn 424 1 e 1 fn_ctrl_swap
425 1 e 1 sticky_fn
426 1 e 1 power_management_beeps
427 1 e 1 low_battery_beep
428 1 e 1 uwb
# coreboot config options: bootloader # coreboot config options: bootloader
418 512 s 0 boot_devices 432 512 s 0 boot_devices
930 8 h 0 boot_default 944 8 h 0 boot_default
938 1 e 1 power_management_beeps
939 1 e 1 low_battery_beep
940 1 e 1 uwb
# coreboot config options: northbridge # coreboot config options: northbridge
944 8 h 0 volume 952 4 e 11 gfx_uma_size
952 4 e 11 gfx_uma_size
# coreboot config options: check sums # coreboot config options: check sums
984 16 h 0 check_sum 984 16 h 0 check_sum

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@ -22,13 +22,14 @@ entries
384 1 e 4 boot_option 384 1 e 4 boot_option
388 4 h 0 reboot_counter 388 4 h 0 reboot_counter
393 3 e 5 baud_rate 393 3 e 5 baud_rate
396 5 e 10 ecc_scrub_rate #396 5 unused
401 1 e 1 interleave_chip_selects 401 1 e 1 interleave_chip_selects
402 1 e 1 interleave_nodes 402 1 e 1 interleave_nodes
403 1 e 1 interleave_memory_channels 403 1 e 1 interleave_memory_channels
404 2 e 8 max_mem_clock 404 2 e 8 max_mem_clock
406 1 e 2 multi_core 406 1 e 2 multi_core
412 4 e 6 debug_level 412 4 e 6 debug_level
416 5 e 10 ecc_scrub_rate
440 4 e 9 slow_cpu 440 4 e 9 slow_cpu
444 1 e 1 nmi 444 1 e 1 nmi
445 1 e 1 gart 445 1 e 1 gart

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@ -7,8 +7,9 @@ entries
392 1 e 2 boot_option 392 1 e 2 boot_option
393 1 e 1 multi_core 393 1 e 1 multi_core
394 3 e 3 baud_rate 394 3 e 3 baud_rate
397 4 e 4 debug_level #397 3 unused
# leave 7 bits to make checksummed area end byte-aligned 400 4 e 4 debug_level
# leave 4 bits to make checksummed area end byte-aligned
408 16 h 0 check_sum 408 16 h 0 check_sum
enumerations enumerations

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@ -22,13 +22,14 @@ entries
384 1 e 4 boot_option 384 1 e 4 boot_option
388 4 h 0 reboot_counter 388 4 h 0 reboot_counter
393 3 e 5 baud_rate 393 3 e 5 baud_rate
396 5 e 10 ecc_scrub_rate #396 5 unused
401 1 e 1 interleave_chip_selects 401 1 e 1 interleave_chip_selects
402 1 e 1 interleave_nodes 402 1 e 1 interleave_nodes
403 1 e 1 interleave_memory_channels 403 1 e 1 interleave_memory_channels
404 2 e 8 max_mem_clock 404 2 e 8 max_mem_clock
406 1 e 2 multi_core 406 1 e 2 multi_core
412 4 e 6 debug_level 412 4 e 6 debug_level
416 5 e 10 ecc_scrub_rate
440 4 e 9 slow_cpu 440 4 e 9 slow_cpu
444 1 e 1 nmi 444 1 e 1 nmi
445 1 e 1 gart 445 1 e 1 gart

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@ -22,13 +22,14 @@ entries
384 1 e 4 boot_option 384 1 e 4 boot_option
388 4 h 0 reboot_counter 388 4 h 0 reboot_counter
393 3 e 5 baud_rate 393 3 e 5 baud_rate
396 5 e 10 ecc_scrub_rate #396 5 unused
401 1 e 1 interleave_chip_selects 401 1 e 1 interleave_chip_selects
402 1 e 1 interleave_nodes 402 1 e 1 interleave_nodes
403 1 e 1 interleave_memory_channels 403 1 e 1 interleave_memory_channels
404 2 e 8 max_mem_clock 404 2 e 8 max_mem_clock
406 1 e 2 multi_core 406 1 e 2 multi_core
412 4 e 6 debug_level 412 4 e 6 debug_level
416 5 e 10 ecc_scrub_rate
440 4 e 9 slow_cpu 440 4 e 9 slow_cpu
444 1 e 1 nmi 444 1 e 1 nmi
445 1 e 1 gart 445 1 e 1 gart

View file

@ -22,13 +22,14 @@ entries
384 1 e 4 boot_option 384 1 e 4 boot_option
388 4 h 0 reboot_counter 388 4 h 0 reboot_counter
393 3 e 5 baud_rate 393 3 e 5 baud_rate
396 5 e 10 ecc_scrub_rate #396 5 unused
401 1 e 1 interleave_chip_selects 401 1 e 1 interleave_chip_selects
402 1 e 1 interleave_nodes 402 1 e 1 interleave_nodes
403 1 e 1 interleave_memory_channels 403 1 e 1 interleave_memory_channels
404 2 e 8 max_mem_clock 404 2 e 8 max_mem_clock
406 1 e 2 multi_core 406 1 e 2 multi_core
412 4 e 6 debug_level 412 4 e 6 debug_level
416 5 e 10 ecc_scrub_rate
440 4 e 9 slow_cpu 440 4 e 9 slow_cpu
444 1 e 1 nmi 444 1 e 1 nmi
445 1 e 1 gart 445 1 e 1 gart